US2013217181A1PendingUtilityA1
Method of manufacturing semiconductor package
Est. expiryJul 7, 2031(~4.9 yrs left)· nominal 20-yr term from priority
H10P 54/00H10W 90/754H10W 90/732H10W 90/724H10W 90/00H10W 74/01H10W 74/00H10W 72/9413H10W 72/884H10W 72/29H10W 44/251H10W 44/248H10W 44/209H10W 74/127H10W 74/019H10W 74/016H10W 74/014H10W 72/0198H10W 70/685H10W 70/635H10W 70/614H10W 70/095H10W 70/093H10W 70/65H10W 70/09H10W 70/05H10W 20/42H10W 72/00H10W 44/20H10W 70/60H01Q 1/2283H05K 1/185H01Q 1/24H05K 2203/061H01L 21/565
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Claims
Abstract
A method of manufacturing a semiconductor package, the method including: disposing a plurality of semiconductor chips; forming a sealing part sealing the plurality of semiconductor chips; forming a substrate part on at least one surface of the sealing part; and forming an antenna part on the sealing part or the substrate part.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A method of manufacturing a semiconductor package, the method comprising:
disposing a plurality of semiconductor chips; forming a sealing part sealing the plurality of semiconductor chips; forming a substrate part on at least one surface of the sealing part; and forming an antenna part on the sealing part or the substrate part.
2 . The method of claim 1 , wherein the disposing of the plurality of semiconductor chips includes arranging semiconductor chips sorted into good products on a carrier.
3 . The method of claim 2 , wherein the disposing of the plurality of semiconductor chips includes attaching the semiconductor chips to an adhesive layer formed on the carrier.
4 . The method of claim 1 , wherein the forming of the sealing part includes forming the sealing part using an epoxy mold compound (EMC).
5 . The method of claim 1 , further comprising, after the forming of the sealing part, forming a via connection part penetrating through the sealing part.
6 . The method of claim 5 , wherein the forming of the antenna part includes electrically connecting the antenna part and the semiconductor chips through the via connection part.
7 . The method of claim 1 , wherein the forming of the substrate part includes forming a multi-layer substrate part on each of upper and lower surfaces of the sealing part.
8 . The method of claim 7 , wherein the forming of the antenna part includes forming a plurality of radiators on several layers of the substrate part.
9 . The method of claim 1 , wherein the forming of the antenna part includes forming a groove in an outer surface of the sealing part and forming the antenna part therein.
10 . The method of claim 1 , wherein the forming of the substrate part includes repeatedly forming fine circuit patterns and insulating layers through a semiconductor manufacturing processJoin the waitlist — get patent alerts
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