Programmable metallization memory cells via selective channel forming

Abstract

Programmable metallization memory cells include an electrochemically active electrode, an inert electrode and an internal layer between the electrochemically active electrode and the inert electrode. The internal layer having a fast ion conductor material and an apertured layer having a plurality of apertures defined by an electrically insulating material. Each aperture defines at least a portion of a column of fast ion conductor material having superionic clusters.

What is claimed is: 
     
         1 . A programmable metallization memory cell comprising:
 a first electrode in electrical contact with a bit line, the first electrode comprising an electrochemically active metal layer;   a second electrode in electrical contact with a word line, the bit line being orthogonal to the word line; and   an internal layer between the electrochemically active metal layer and the second electrode, the internal layer comprising a fast ion conductor material and an apertured layer comprising a plurality of apertures defined by an electrically insulating material, each aperture defines at least a portion of a column of fast ion conductor material having superionic clusters.   
     
     
         2 . The memory cell of  claim 1  wherein the electrically insulating material comprises a dielectric material. 
     
     
         3 . The memory cell of  claim 1  wherein the fast ion conductor material comprises a chalcogenide material. 
     
     
         4 . The memory cell of  claim 1  wherein the fast ion conductor material comprises a germanium selenide material. 
     
     
         5 . The memory cell of  claim 1  wherein the apertured layer is in contact with the electrochemically active metal layer. 
     
     
         6 . The memory cell of  claim 1  wherein the apertured layer is in contact with the inert electrode. 
     
     
         7 . The memory cell of  claim 1  wherein the apertured layer is in contact with the electrochemically active metal layer and the inert electrode. 
     
     
         8 . The memory cell of  claim 1  wherein the plurality of apertures each have an aperture diameter of about 20 to 50 nm. 
     
     
         9 . A programmable metallization memory cell comprising:
 an electrochemically active electrode;   an inert electrode; and   an internal layer between the electrochemically active electrode and the inert electrode, the internal layer comprising a fast ion conductor material layer and an apertured layer comprising a plurality of apertures defined by an electrically insulating material, the apertured layer separating the fast ion conductor material layer and the active electrode the plurality of apertures defining at least a portion of a plurality of columnar superionic clusters within the fast ion conductor material.   
     
     
         10 . The memory cell of  claim 9  wherein the electrically insulating material comprises a dielectric material. 
     
     
         11 . The memory cell of  claim 9  wherein the fast ion conductor material comprises a chalcogenide material. 
     
     
         12 . The memory cell of  claim 9  wherein the fast ion conductor material comprises a germanium selenide material. 
     
     
         13 . The memory cell of  claim 9  wherein the apertured layer is in contact with both the inert electrode and the electrochemically active electrode. 
     
     
         14 . The memory cell of  claim 9  wherein the plurality of apertures each has a diameter of about 20 to 50 nm. 
     
     
         15 . A programmable metallization memory cell comprising:
 an electrochemically active electrode;   an inert electrode; and   an internal layer between the electrochemically active electrode and the inert electrode, the internal layer comprising a fast ion conductor material and an apertured layer comprising a plurality of apertures defined by an electrically insulating material, each aperture defines at least a portion of a column of fast ion conductor material having superionic clusters.   
     
     
         16 . The memory cell of  claim 15  wherein the electrically insulating material comprises a dielectric material. 
     
     
         17 . The memory cell of  claim 15  wherein the fast ion conductor material comprises a chalcogenide material. 
     
     
         18 . The memory cell of  claim 15  wherein the fast ion conductor material comprises a germanium selenide material. 
     
     
         19 . The memory cell of  claim 15  wherein the apertured layer is in contact with both the electrochemically active electrode and the inert electrode. 
     
     
         20 . The memory cell of  claim 15  wherein the plurality of apertures each has a diameter of about 20 to 50 nm.