Network on chip (noc) with qos features

Abstract

Quality-of-Service (QoS) is an important system-level requirement in the design and implementation of on-chip networks. QoS requirements can be implemented in an on-chip-interconnect by providing for at least two signals indicating priority at a transaction-level interface where one signal transfers information in-band with the transaction and the other signal transfers information out-of-band with the transaction. The signals can be processed by the on-chip-interconnect to deliver the required QoS. In addition, the disclosed embodiments can be extended to a Network-on-Chip (NoC).

What is claimed is: 
     
         1 . A system for transmitting priority information in an on-chip-interconnect, the system comprising:
 a plurality of signal carriers for carrying an in-band priority signal an out-of-band priority signal and a third priority signal;   an arbitration point comprising a first input and a second input; and   wherein the arbitration point selects the first input over the second input when a priority indicated by the in-band priority signal or a priority indicated by the out-of-band priority signal is greater than a priority indicated by the third priority signal.   
     
     
         2 . The system of  claim 1 , wherein the priorities of at least two of the in-band priority signal, the out-of-band priority signal and the third priority signal are bar-graph encoded. 
     
     
         3 . A method of transmitting priority information at a transport layer interface of an on-chip-interconnect comprising:
 receiving an in-band signal;   receiving an out-of-band signal; and   processing a downstream signal that is assigned a priority that is the greater of a priority indicated by the in-band signal and a priority indicated by the out-of-band signal.   
     
     
         4 . The method of  claim 3 , wherein processing the downstream signal comprises:
 arbitrating the downstream signal based at least in part on the assigned priority that is the greater of the priority indicated by the in-band signal and the priority indicated by the out-of-band signal.   
     
     
         5 . An on-chip-interconnect comprising:
 a first network of transport IP elements for transmitting request packets; and   a second network of transport IP elements for transmitting response packets, wherein the first network and the second network are logically independent.   
     
     
         6 . The on-chip-interconnect of  claim 5  wherein packets of the first network implement an urgency value and packets of the second network do not. 
     
     
         7 . An initiator network interface unit comprising:
 a memory unit that stores a value of a priority level of a most recent packet sent on a route; and   a logic unit configured to:   identify a signal that indicates a desired priority level; and   generate an urgency packet and send the urgency packet on the route when the value of the priority level stored in the memory unit is less than a value of the desired priority level indicated by the signal.   
     
     
         8 . The initiator network interface unit of  claim 7  comprising:
 a memory unit that stores a value of a priority level of a most recent packet sent on an alternate route, 
 wherein the logic unit, separately from generating and sending the urgency packet on the route, generates an urgency packet for the alternate route and sends the urgency packet on the alternate route when the value of the priority level of the most recent packet sent on the alternate route is less than the value of the desired priority level indicated by the signal.