US2013157385A1PendingUtilityA1

Method for fabricating semiconductor device

Assignee: JUNG BO KYOUNGPriority: Dec 16, 2011Filed: Jun 21, 2012Published: Jun 20, 2013
Est. expiryDec 16, 2031(~5.4 yrs left)· nominal 20-yr term from priority
G11C 11/15H10N 50/01G11C 11/161
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Claims

Abstract

A method for fabricating a semiconductor device includes forming a bottom-electrode metal layer over a substrate, planarizing the bottom-electrode metal layer by a first thickness through a chemical mechanical polishing (CMP) process, etching the bottom-electrode metal layer by a second thickness through a wet etching process, forming a plurality of layers of a magnetic tunneling junction (MTJ) element over the bottom-electrode metal layer, forming a top electrode over the plurality of layers, and forming the MTJ element and a bottom electrode by etching the plurality of layers and the bottom-electrode metal layer using the top electrode as an etch mask.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method for fabricating a semiconductor device, comprising:
 forming a bottom-electrode metal layer over a substrate;   planarizing the bottom-electrode metal layer by a first thickness through a chemical mechanical polishing (CMP) process;   etching the bottom-electrode metal layer by a second thickness through a wet etching process;   forming a plurality of layers of a magnetic tunneling junction (MTJ) element over the bottom-electrode metal layer;   forming a top electrode over the plurality of layers; and   forming the MTJ element and a bottom electrode by etching the plurality of layers and the bottom-electrode metal layer using the top electrode as an etch mask.   
     
     
         2 . The method of  claim 1 , wherein the forming of the top electrode comprises:
 forming a top-electrode metal layer over the plurality of layers;   forming a carbon layer pattern over the top-electrode metal layer; and   forming the top electrode by patterning the top-electrode metal layer using the carbon layer pattern as an etch mask.   
     
     
         3 . The method of  claim 2 , wherein the forming of the carbon layer pattern comprises:
 forming a carbon layer over the top-electrode metal layer;   forming a photoresist pattern over the carbon layer; and   forming the carbon layer pattern by patterning the carbon layer using the photoresist pattern as an etch mask.   
     
     
         4 . The method of  claim 1 , wherein the bottom electrode has a thickness of 50 Å or less. 
     
     
         5 . The method of  claim 1 , wherein the bottom electrode comprises titanium nitride. 
     
     
         6 . The method of  claim 1 , wherein the first thickness is equal to or less than 200 Å, and the second thickness is equal to or less than 50 Å. 
     
     
         7 . A method for fabricating a semiconductor device, comprising:
 forming a bottom-electrode metal layer over a substrate;   planarizing the bottom-electrode metal layer by a first thickness through a chemical mechanical polishing (CMP) process;   etching the bottom-electrode metal layer by a second thickness through a dry etching process;   forming a plurality of layers of a magnetic tunneling junction (MTJ) element over the bottom-electrode metal layer;   forming a top electrode over the plurality of layers; and   forming the MTJ element and a bottom electrode by etching the plurality of layers and the bottom-electrode metal layer using the top electrode an etch mask.   
     
     
         8 . The method of  claim 7 , wherein the forming of the top electrode comprises:
 forming a top-electrode metal layer over the plurality of layers;   forming a carbon layer pattern over the top-electrode metal layer; and   forming the top electrode by patterning the top-electrode metal layer using the carbon layer pattern as an etch mask.   
     
     
         9 . The method of  claim 8 , wherein the forming of the carbon layer pattern comprises:
 forming a carbon layer over the top-electrode metal layer;   forming a photoresist pattern over the carbon layer; and   forming the carbon layer pattern by patterning the carbon layer using the photoresist pattern as an etch mask.   
     
     
         10 . The method of  claim 7 , wherein the bottom electrode has a thickness of 50 Å or less. 
     
     
         11 . The method of  claim 7 , wherein the bottom electrode comprises titanium nitride. 
     
     
         12 . The method of  claim 7 , wherein the first thickness is equal to or less than 200 Å, and the second thickness is equal to or less than 50 Å. 
     
     
         13 . The method of  claim 7 , wherein the dry etching process uses on HBr as a base of etching gas. 
     
     
         14 . A method for fabricating a semiconductor device, comprising:
 forming a metal layer of a bottom electrode over a substrate;   performing a first etching process to form the metal layer of a first thickness;   performing a second etching process to form the metal layer of a second thickness;   forming a plurality of layers of a magnetic tunneling junction (MTJ) element over the metal layer;   forming a top electrode over the plurality of layers; and   forming the MTJ element and a bottom electrode by etching the plurality of layers and the metal layer using the top electrode as an etch mask.   
     
     
         15 . The method of  claim 14 , wherein the first etching process comprises a chemical mechanical polishing (CMP) process to planarize the metal layer. 
     
     
         16 . The method of  claim 14 , wherein the second etching process comprises a wet etching process or a dry etching process.

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