US2013153906A1PendingUtilityA1

Thin film transistor array panel having improved storage capacitance and manufacturing method thereof

Assignee: SAMSUNG DISPLAY CO LTDPriority: Feb 25, 2005Filed: Nov 2, 2012Published: Jun 20, 2013
Est. expiryFeb 25, 2025(expired)· nominal 20-yr term from priority
G02F 1/133345G02F 2202/02G02F 1/136222G02F 1/1362G02F 1/136286
57
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A thin film transistor array panel is provided, which includes a gate line, a data line intersecting the gate line, a storage electrode apart from the gate and data lines, a thin film transistor connected to the gate and data lines and having a drain electrode, a pixel electrode connected to the drain electrode, a first insulating layer over the thin film transistor and disposed under the pixel electrode, and a second insulating layer disposed on the first insulating layer and having an opening exposing the first insulating layer on the storage electrode.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A thin film transistor array panel, comprising:
 a gate line;   a data line intersecting the gate line;   a semiconductor disposed under the data line;   a thin film transistor connected to the gate line and the data line and having a drain electrode;   a first insulating layer disposed on the data line and comprising an organic material;   a pixel electrode disposed on the first insulating layer and connected to the drain electrode;   a shielding electrode disposed in the same layer as the pixel electrode and transmitting a common voltage, the shielding electrode comprising a first portion extending along the data line and covering the data line.   
     
     
         2 . The thin film transistor array panel of  claim 1 , wherein the shielding electrode completely covers boundary edges of the data line. 
     
     
         3 . The thin film transistor array panel of  claim 2 , wherein the shielding electrode overlaps at least a portion of the gate line. 
     
     
         4 . The thin film transistor array panel of  claim 3 , wherein the shielding electrode comprises a second portion extending along the gate line. 
     
     
         5 . The thin film transistor array panel of  claim 4 , wherein a width of the shielding electrode is greater than a width of the data line. 
     
     
         6 . The thin film transistor array panel of  claim 5 , wherein the width of the shielding electrode is less than a width of the gate line. 
     
     
         7 . The thin film transistor array panel of  claim 4 , wherein the width of the shielding electrode is less than a width of the gate line. 
     
     
         8 . The thin film transistor array panel of  claim 3 , wherein a width of the shielding electrode is greater than a width of the data line. 
     
     
         9 . The thin film transistor array panel of  claim 8 , wherein the width of the shielding electrode is less than a width of the gate line. 
     
     
         10 . The thin film transistor array panel of  claim 3 , wherein the width of the shielding electrode is less than a width of the gate line. 
     
     
         11 . The thin film transistor array panel of  claim 2 , wherein the shielding electrode comprises a second portion extending along the gate line. 
     
     
         12 . The thin film transistor array panel of  claim 11 , wherein a width of the shielding electrode is greater than a width of the data line. 
     
     
         13 . The thin film transistor array panel of  claim 12 , wherein the width of the shielding electrode is less than a width of the gate line. 
     
     
         14 . The thin film transistor array panel of  claim 11 , wherein the width of the shielding electrode is less than a width of the gate line. 
     
     
         15 . The thin film transistor array panel of  claim 2 , wherein a width of the shielding electrode is greater than a width of the data line. 
     
     
         16 . The thin film transistor array panel of  claim 15 , wherein the width of the shielding electrode is less than a width of the gate line. 
     
     
         17 . The thin film transistor array panel of  claim 2 , wherein the width of the shielding electrode is less than a width of the gate line. 
     
     
         18 . The thin film transistor array panel of  claim 1 , wherein the shielding electrode overlaps at least a portion of the gate line. 
     
     
         19 . The thin film transistor array panel of  claim 18 , wherein the shielding electrode comprises a second portion extending along the gate line. 
     
     
         20 . The thin film transistor array panel of  claim 19 , wherein a width of the shielding electrode is greater than a width of the data line. 
     
     
         21 . The thin film transistor array panel of  claim 20 , wherein the width of the shielding electrode is less than a width of the gate line. 
     
     
         22 . The thin film transistor array panel of  claim 19 , wherein the width of the shielding electrode is less than a width of the gate line. 
     
     
         23 . The thin film transistor array panel of  claim 18 , wherein a width of the shielding electrode is greater than a width of the data line. 
     
     
         24 . The thin film transistor array panel of  claim 23 , wherein the width of the shielding electrode is less than a width of the gate line. 
     
     
         25 . The thin film transistor array panel of  claim 18 , wherein the width of the shielding electrode is less than a width of the gate line. 
     
     
         26 . The thin film transistor array panel of  claim 1 , wherein the shielding electrode comprises a second portion extending along the gate line. 
     
     
         27 . The thin film transistor array panel of  claim 26 , wherein a width of the shielding electrode is greater than a width of the data line. 
     
     
         28 . The thin film transistor array panel of  claim 27 , wherein the width of the shielding electrode is less than a width of the gate line. 
     
     
         29 . The thin film transistor array panel of  claim 26 , wherein the width of the shielding electrode is less than a width of the gate line. 
     
     
         30 . The thin film transistor array panel of  claim 1 , wherein a width of the shielding electrode is greater than a width of the data line. 
     
     
         31 . The thin film transistor array panel of  claim 30 , wherein the width of the shielding electrode is less than a width of the gate line. 
     
     
         32 . The thin film transistor array panel of  claim 1 , wherein the width of the shielding electrode is less than a width of the gate line.

Join the waitlist — get patent alerts

Track US2013153906A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.