Systems and methods for storing data in a multi-level cell solid state storage device

Abstract

This disclosure is related to systems and methods for storing data in multi-level cell solid state storage devices, such as Flash memory devices. In one example, a multi-level cell memory array has programmable pages, a first page having a first programming time, and a second page having a second programming time that is different than the first programming time. In one embodiment, the first programming time is faster than the to second programming time. Further, a controller coupled to the multi-level cell memory array may be configured to select the first page to store the data when a priority level of a write operation indicates a first priority level and select the second page to store the data when the priority level indicates a second priority level.

What is claimed is: 
     
         1 . A device comprising:
 a multi-level cell memory having a same physical page configured to be programmed at different programming rates by selecting different levels of a voltage provided to cells within the same physical page.   
     
     
         2 . The device of  claim 1  and wherein the multi-level cell memory comprises multi-level cell (MLC) NAND Flash memory. 
     
     
         3 . The device of  claim 1  and further comprising a second memory, other than the multi-level cell memory, configured to store a map having a list of multiple logical pages associated with corresponding ones of the different programming rates. 
     
     
         4 . The device of  claim 3  and further comprising:
 a controller configured to:
 receive a write request from a host for data to be stored in the multi-level cell memory; 
 determine a priority level of the write request; 
 select one of the multiple logical pages associated with a programming rate of the different programming rates that corresponds to the determined priority level of the write request; and 
 store data associated with the write request in the selected one of the multiple logical pages. 
 
 
     
     
         5 . The device of  claim 4  and wherein the priority level is determined based on a type of data, an indicator from the host, an amount of buffer space filled, or a fill rate of a buffer. 
     
     
         6 . The device of  claim 3  and wherein the map further comprises multiple priority levels, with each of the multiple priority levels being associated with a different one of the programming rates. 
     
     
         7 . The device of  claim 6  and further comprising a controller configured to receive an indicator of a user selectable setting to initially store all data to one of the multiple logical pages associated with a particular one of the different priority levels in the map. 
     
     
         8 . A device comprising:
 a same physical page configured to be, at a same time, associated with multiple logical pages having different associated page programming times.   
     
     
         9 . The device of  claim 8  and further comprising a multi-level cell solid state memory comprising the same physical page. 
     
     
         10 . The device of  claim 9  and further comprising:
 a controller configured to:
 receive a write request from a host for data to be stored in the multi-level cell solid state memory; 
 determine a priority level of the write request; 
 select one of the multiple logical pages having a page programming time of the different page programming times that corresponds to the determined priority level of the write request; and 
 store data associated with the write request in the selected one of the multiple logical pages. 
 
 
     
     
         11 . The device of  claim 10  and wherein the priority level is determined based on a type of data, an indicator from the host, an amount of buffer space filled, or a fill rate of a buffer. 
     
     
         12 . The device of  claim 9  and wherein the multi-level cell solid state memory comprises multi-level cell (MLC) NAND Flash memory. 
     
     
         13 . The device of  claim 9  and further comprising a second memory, other than the multi-level cell solid state memory, configured to store a map that includes a list of the multiple logical pages and an indicator of a priority level associated with each of the multiple logical pages, each indicator of the priority level in the map being a different priority level that corresponds to a respective one of the different page programming times. 
     
     
         14 . The device of  claim 13  and further comprising a controller configured to receive an indicator of a user selectable setting to initially store all data to one of the multiple logical pages associated with a particular one of the different priority levels in the map. 
     
     
         15 . A method comprising:
 associating a same physical page with multiple logical pages having different associated page programming times.   
     
     
         16 . The method of  claim 15  and wherein the same physical page is a part of a multi-level solid state memory. 
     
     
         17 . The method of  claim 16  and further comprising:
 receiving a write request from a host for data to be stored in the multi-level cell solid state memory; 
 determining a priority level of the write request; 
 selecting one of the multiple logical pages having a page programming time of the different page programming times that corresponds to the determined priority level of the write request; and 
 storing data associated with the write request in the selected one of the multiple logical pages. 
 
     
     
         18 . The method of  claim 17  and wherein determining the priority level of the write request comprises determining the priority level of the write request based on a type of data, an indicator from the host, an amount of buffer space filled, or a fill rate of a buffer. 
     
     
         19 . The method of  claim 15  and further comprising storing a map that includes a list of the multiple logical pages and an indicator of a priority level associated with each of the multiple logical pages, each indicator of the priority level in the map being a different priority level that corresponds to a respective one of the different page programming times. 
     
     
         20 . The method of  claim 19  and further comprising receiving an indicator of a user selectable setting to initially store all data to one of the multiple logical pages associated with a particular one of the different priority levels in the map.