Test electronics to device under test interfaces, and methods and apparatus using same

Abstract

In one embodiment, an interface includes a plurality of test electronics to DUT interfaces. Each test electronics to DUT interface has at least one test electronics interface, at least one DUT interface, and an electrical coupling between the at least one test electronics interface and the at least one DUT interface. First and second subsets of the DUT interfaces are respectively positioned along the perimeters of first and second concentric shapes.

What is claimed is: 
     
         1 . An interface, comprising:
 a plurality of test electronics to DUT interfaces, each test electronics to DUT interface having at least one test electronics interface, at least one DUT interface, and an electrical coupling between the at least one test electronics interface and the at least one DUT interface;   wherein first and second subsets of the DUT interfaces are respectively positioned along the perimeters of first and second concentric shapes.   
     
     
         2 . The interface of  claim 1 , wherein the DUT interfaces comprise zero insertion force (ZIF) connectors, and wherein the ZIF connectors are respectively positioned along the perimeters of the first and second concentric shapes. 
     
     
         3 . The interface of  claim 1 , further comprising:
 a plurality of test electronics assemblies positioned adjacent one another, wherein each of the test electronics assemblies is coupled to the test electronics interfaces of a subset of the test electronics to DUT interfaces, and thereby, to a subset of adjacent DUT interfaces positioned in either i) the first of the concentric shapes, or ii) the second of the concentric shapes.