Cpu emulation system, cpu emulation method, and recording medium having a cpu emulation program recorded thereon

Abstract

A CPU emulation system includes; a plurality of virtual CPUs each operating on a different physical CPU; an instruction sequence selecting section for selecting an instruction sequence to be optimized; a virtual CPU selecting section for selecting one of the plurality of virtual CPUs, which is to perform optimization processing of the selected instruction sequence, based on usage rates of the plurality of virtual CPUs; and an optimization level selecting section for determining an optimization level of the optimization processing that is to be executed by the selected one of the plurality of virtual CPUs, and giving a direction to perform the optimization processing to the selected one of the plurality of virtual CPUs.

What is claimed is: 
     
         1 . A CPU emulation system, comprising:
 an instruction sequence association management section for managing association among an untranslated instruction sequence, a translated instruction sequence, and an optimized instruction sequence, the untranslated instruction sequence being an instruction sequence before architecture translation processing, the translated instruction sequence being an instruction sequence obtained by translating the untranslated instruction sequence into a format executable on a physical CPU, the optimized instruction sequence being an instruction sequence obtained by subjecting the translated instruction sequence to optimization processing;   a plurality of virtual CPUs each operating on a different physical CPU;   an instruction sequence selecting section for selecting an instruction sequence to be optimized;   an optimization direction section for giving directions to perform the optimization processing of the selected instruction sequence to the plurality of virtual CPUs, the directions specifying different optimization levels among the plurality of virtual CPUs; and   an optimization information writing section for writing, upon completion of the optimization processing by one of the plurality of virtual CPUs, information on the optimized instruction sequence thus obtained into the instruction sequence association management section in association with the translated instruction sequence that is a source of the optimized instruction sequence.   
     
     
         2 . A CPU emulation system according to  claim 1 , wherein, when instruction sequence execution processing is performed, the instruction sequence association management section is referred to, and an instruction sequence having a highest optimization level is selected and executed. 
     
     
         3 . A CPU emulation system according to  claim 1 , wherein, when the information on the optimized instruction sequence is written, the optimization information writing section further writes information on the optimization level adopted for the optimized instruction sequence. 
     
     
         4 . A CPU emulation method, comprising:
 selecting an instruction sequence to be optimized;   giving a plurality of virtual CPUs directions to perform optimization processing at different optimization levels with regard to the selected instruction sequence; and   writing, upon completion of the optimization processing by one of the plurality of virtual CPUs, information on an optimized instruction sequence thus obtained into an instruction sequence association management section in association with a translated instruction sequence that is a source of the optimized instruction sequence.   
     
     
         5 . A CPU emulation method according to  claim 4 , further comprising referring to, when instruction sequence execution processing is performed, the instruction sequence association management section, to thereby select and execute an instruction sequence having a highest optimization level. 
     
     
         6 . A CPU emulation method according to  claim 4 , further comprising further writing, when the information on the optimized instruction sequence is written, information on the optimization level adopted for the optimized instruction sequence. 
     
     
         7 . A recording medium having a CPU emulation program recorded thereon, the CPU emulation program causing a computer to execute the processings of:
 selecting an instruction sequence to be optimized;   giving a plurality of virtual CPUs directions to perform optimization processing at different optimization levels with regard to the selected instruction sequence; and   writing, upon completion of the optimization processing by one of the plurality of virtual CPUs, information on an optimized instruction sequence thus obtained into an instruction sequence association management section in association with a translated instruction sequence that is a source of the optimized instruction sequence.   
     
     
         8 . A recording medium having a CPU emulation program recorded thereon according to  claim 7 , the CPU emulation program further causing the computer to execute processing of referring to, when instruction sequence execution processing is performed, the instruction sequence association management section, to thereby select and execute an instruction sequence having a highest optimization level. 
     
     
         9 . A recording medium having a CPU emulation program recorded thereon according to  claim 7 , the CPU emulation program further causing the computer to execute processing of further writing, when the information on the optimized instruction sequence is written, information on the optimization level adopted for the optimized instruction sequence.