Nitride compound semiconductor element and production method therefor

Abstract

A nitride compound semiconductor element according to the present invention is a nitride compound semiconductor element including a substrate 1 having an upper face and a lower face and a semiconductor multilayer structure 40 supported by the upper face of the substrate 1, such that the substrate 1 and the semiconductor multilayer structure 40 have at least two cleavage planes. At least one cleavage inducing member 3 which is in contact with either one of the two cleavage planes is provided, and a size of the cleavage inducing member 3 along a direction parallel to the cleavage plane is smaller than a size of the upper face of the substrate 1 along the direction parallel to the cleavage plane.

1 . A method for fabricating a nitride compound semiconductor device, the method comprising steps of:
 (a) preparing a flat wafer formed of gallium nitride;   (b) forming projections only at intersections of first lines and second lines included in a surface of the flat wafer prepared in the step (a); wherein   the first lines and the second lines are perpendicular to a normal line of the flat wafer;   each first line is parallel to other first lines;   each second line is parallel to other second lines;   each first line is perpendicular to each second line;   a part of the projections are disposed periodically in the longitudinal direction of the first lines;   another part of the projections are disposed periodically in the longitudinal direction of the second lines;   each projection has an area of not less than 50 square micrometers and not more than 1,800 square micrometers;   (c) growing a nitride semiconductor stacking structure on the flat wafer where the projections have been formed in the step (b); and   (d) cleaving the wafer along the first lines and along the second lines after the step (c), so as to fabricating the nitride compound semiconductor device comprising the cleaved wafer and the nitride semiconductor stacking structure grown thereon.   
     
     
         2 . The method according to  claim 1 , wherein each projection has a thickness of not more than 0.5 micrometers. 
     
     
         3 . The method according to  claim 1 , wherein
 in the step (c), the nitride semiconductor stacking structure includes a high defect-concentration region on one of the projections; and   the high defect-concentration region has lower crystallinity than other part of the nitride semiconductor stacking structure.   
     
     
         4 . The method according to  claim 1 , wherein
 the projections are formed of an insulator.   
     
     
         5 . The method according to  claim 4 , wherein
 the projections are formed of oxide or nitride of silicon, aluminum, titanium, niobium, zirconia, or tantalium.   
     
     
         6 . The method according to  claim 4 ,
 the projections are formed of SiO 2  or silicon nitride.   
     
     
         7 . The method according to  claim 1 , wherein
 the projections are formed of at least one material selected from the group consisting of gold, platinum, aluminum, nickel, palladium, and titanium.   
     
     
         8 . The method according to  claim 1 , wherein
 each projection is formed of a semiconductor material;   the semiconductor material has a different composition from a material of the the nitride semiconductor stacking structure.   
     
     
         9 . The method according to  claim 8 , wherein
 the semiconductor material is formed of Al x Ga y N;   where   x+y=1, 0≦x≦1, and 0≦y≦1.   
     
     
         10 . The method according to  claim 1 , wherein
 the normal line of the flat wafer has a <0001> direction;   each first line has a <1-100> direction; and   each second line has a <11-20> direction.