Microchip and Method of Using the Same

Abstract

A microchip including a first substrate with a groove formed on a substrate surface or a pass-through hole passing in a thickness direction of the substrate, and one or more second substrates laminated on a surface of the first substrate; the microchip including an optical measurement cuvette consisting of a space configured by the groove or the pass-through hole, and a substrate surface of the second substrate; wherein a side wall surface of the second substrate is positioned on an inner side than a side wall surface of the first substrate in at least one part of a side wall surface of the microchip, and a method of using the same are provided.

1 . A microchip including a first substrate with a groove formed on a substrate surface or a pass-through hole passing in a thickness direction of the substrate, and one or more second substrates laminated on a surface of said first substrate; the microchip comprising:
 an optical measurement cuvette consisting of a space configured by said groove or said pass-through hole, and a substrate surface of said second substrate; wherein   a side wall surface of said second substrate is positioned on an inner side than a side wall surface of said first substrate in at least one part of a side wall surface of said microchip.   
     
     
         2 . The microchip according to  claim 1 , wherein the side wall surface of said second substrate is positioned on the inner side than the side wall surface of said first substrate in all the side wall surfaces of said microchip. 
     
     
         3 . The microchip according to  claim 1 , wherein the substrate surface of said second substrate is smaller than the substrate surface of said first substrate. 
     
     
         4 . The microchip according to  claim 1 , wherein the side wall surface of said first substrate in at least one part of said side wall surface of the microchip does not include a projection on the surface. 
     
     
         5 . The microchip according to  claim 4 , wherein the side wall surface of said first substrate in at least one part of said side wall surface of the microchip is a plane. 
     
     
         6 - 17 . (canceled)