US2013113992A1PendingUtilityA1
Methods of generating a pixel clock signal from a transmission clock signal and related data transmission methods for multimedia sources
Est. expiryOct 16, 2028(~2.2 yrs left)· nominal 20-yr term from priority
Inventors:Jongshin Shin
H04N 5/38G09G 2370/12G09G 5/12G09G 2370/04H04N 5/067G09G 5/008H04N 21/8547H04N 21/242H04N 5/44H04N 5/775H04N 5/04
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Claims
Abstract
Methods of generating a pixel clock signal for a multimedia source are provided in which a transmission clock signal having a first frequency is generated from a reference clock signal that has a second frequency. The generated transmission clock signal is multiplied by a multiple to generate the pixel clock signal. The pixel clock signal has a third frequency that is the product of the second frequency and the multiple,
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A method of generating a pixel clock signal of a multimedia source, the method comprising:
multiplying a frequency of a reference clock signal to generate a transmission clock signal; outputting the transmission clock signal at the time data of the multimedia source is transmitted; dividing a frequency of the generated transmission clock signal; and multiplying a frequency of the divided transmission clock signal to generate the pixel clock signal of the multimedia source.
2 . The method of claim 1 , wherein a clock multiplication unit is used to multiply the frequency of the reference clock signal by a predetermined amount to generate the transmission clock signal.
3 . The method of claim 2 , further comprising generating the reference clock signal using a phase-locked loop or a delay-locked loop.
4 . The method of claim 2 , further comprising dividing a frequency of the clock signal that is output from the clock multiplication unit to generate the transmission clock signal.
5 . A method of transmitting data of a multimedia source comprising:
multiplying a frequency of a reference clock signal to generate a transmission clock signal; dividing a frequency of the generated transmission clock signal; multiplying a frequency of the divided transmission clock signal to generate a pixel clock signal; converting parallel data in synchronization with the pixel clock signal into serial data; and transmitting the serial data and the transmission clock signal to an external source.
6 . A multimedia system, comprising:
a multimedia source that is configured to convert parallel data into serial data and to generate a transmission clock signal; and a multimedia output device that is configured to receive the serial data from the multimedia source in synchronization with the transmission clock signal, wherein the multimedia source comprises, a clock generator that is configured to generate the transmission clock signal from a reference clock signal and to generate a pixel clock signal by both dividing and multiplying a frequency of the transmission clock signal; a video processor that is configured to generate the parallel data in synchronization with the pixel clock signal; and a transmitter that is configured to output the serial data in synchronization with the transmission clock signal.
7 . The multimedia system of claim 6 , wherein the multimedia source further comprises a phase locked loop that is configured to generate the reference clock signal.
8 . The multimedia system of claim 6 , wherein the clock generator that is configured to generate the pixel clock signal by both dividing and multiplying the frequency of the transmission clock signal comprises a clock generator that is configured to generate the pixel clock signal by first dividing a frequency of the transmission clock signal and by then multiplying a frequency of the divided transmission clock signal.
9 . The method of claim 6 , wherein the frequency of the pixel clock signal is ⅘ the frequency of the transmission clock signal.Join the waitlist — get patent alerts
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