US2013107444A1PendingUtilityA1

System and method for flexible storage and networking provisioning in large scalable processor installations

Assignee: SCHNELL ARNOLD THOMASPriority: Oct 28, 2011Filed: Oct 28, 2011Published: May 2, 2013
Est. expiryOct 28, 2031(~5.2 yrs left)· nominal 20-yr term from priority
G06F 1/181H05K 7/1487H05K 7/20G06F 1/20H05K 5/00H05K 7/2029H05K 7/14G06F 1/18H05K 7/1492H05K 7/1485G06F 13/4027H05K 7/1489H05K 7/1498H05K 7/20736Y10T29/49117Y10T29/49002G06F 1/189
50
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Claims

Abstract

A system and method for provisioning within a system design to allow the storage and IO resources to scale with compute resources are provided.

Claims

exact text as granted — not AI-modified
1 . A scalable system, comprising:
 a chassis having a predetermined physical form factor, the chassis having a plurality of slots into which modules are placed;   one or more compute components that are capable of being housed within the chassis in the plurality of slots;   one or more storage components that are capable of being housed within the chassis in the plurality of slots;   one or more IO components that are capable of being housed within the chassis in the plurality of slots; and   wherein the compute components, the storage components and the IO components housed in the chassis are determined based on a desired computing power, storage power and input/output power of the system such that the system in the chassis is scalable.   
     
     
         2 . The system of  claim 1  further comprising one or more support devices within the chassis that support the other components housed within the chassis. 
     
     
         3 . The system of  claim 2 , wherein the one or more support devices are one of a fan and a power supply. 
     
     
         4 . The system of  claim 1 , wherein the chassis has a set of physical connectors and a volume of space. 
     
     
         5 . The system of  claim 4 , wherein the set of physical connectors is one or more PCIe connectors. 
     
     
         6 . The system of  claim 5 , wherein the set of physical connectors are two PCI Express x16 connectors and the volume of space is 10″ length by 2.7″ height by 1″ width. 
     
     
         7 . The system of  claim 1 , wherein the chassis is one of a 2U chassis and a vertical chassis. 
     
     
         8 . The system of  claim 1 , wherein each compute component further comprises one or more compute nodes, 
     
     
         9 . The system of  claim 8 , wherein each node has a system on chip, a set of system memory that is accessible by the system on chip, a local storage space for the system on chip and connectivity. 
     
     
         10 . The system of  claim 1 , wherein each storage component is one of 2.5″ cased SATA drive, caseless SATA SSD (solid state device) and mSATA (Modular SATA) SSD. 
     
     
         11 . The system of  claim 1 , wherein each IO component has set of connectors and a translation circuit that translates between IO protocols. 
     
     
         12 . The system of  claim 1  further comprising one or more hybrid components that are capable of being housed within the chassis in the plurality of slots, wherein each hybrid component has one or more of the compute component, the storage component and the IO component. 
     
     
         13 . The system of  claim 1  further comprising a straddle slot that spans one or more boards and accepts different components. 
     
     
         14 . A method for building a scalable system in a fixed area, the method comprising:
 providing a chassis having a predetermined physical form factor, the chassis having a plurality of slots into which modules are placed;   providing one or more compute components that are capable of being housed within the chassis in the plurality of slots, one or more storage components that are capable of being housed within the chassis in the plurality of slots and one or more IO components that are capable of being housed within the chassis in the plurality of slots; and   determining, for a system with a desired computing power, storage power and input/output power, one of the one or more compute components, the one or more storage components and the one or more IO components that are housed within the chassis such that the system in the chassis is scalable.   
     
     
         15 . The method of  claim 14  further comprising providing one or more support devices within the chassis that support the other components housed within the chassis. 
     
     
         16 . The method of  claim 15 , wherein the one or more support devices are one of a fan and a power supply. 
     
     
         17 . The method of  claim 14 , wherein the chassis has a set of physical connectors and a volume of space. 
     
     
         18 . The method of  claim 17 , wherein the set of physical connectors is one or more PCIe connectors. 
     
     
         19 . The method of  claim 18 , wherein the set of physical connectors are two PCI Express x16 connectors and the volume of space is 10″ length by 2.7″ height by 1″ width. 
     
     
         20 . The method of  claim 14 , wherein the chassis is one of a 2U chassis and a vertical chassis. 
     
     
         21 . The method of  claim 14 , wherein each compute component further comprises one or more compute nodes, 
     
     
         22 . The method of  claim 21 , wherein each node has a method on chip, a set of method memory that is accessible by the method on chip, a local storage space for the method on chip and connectivity. 
     
     
         23 . The method of  claim 14 , wherein each storage component is one of 2.5″ cased SATA drive, caseless SATA SSD (solid state device) and mSATA (Modular SATA) SSD. 
     
     
         24 . The method of  claim 14 , wherein each IO component has set of connectors and a translation circuit that translates between IO protocols. 
     
     
         25 . The method of  claim 14  further comprising providing one or more hybrid components that are capable of being housed within the chassis in the plurality of slots, wherein each hybrid component has one or more of the compute component, the storage component and the IO component. 
     
     
         26 . A printed circuit board, comprising:
 one or more PCIe connectors through which power is routed;   one or more regulators connected to the printed circuit board that are powered by the one or more PCIe connectors and generate a regulated voltage;   one of a SATA, mSATA and miniSATA connector connected to the printed circuit board that are powered by the regulated voltage; and   wherein a storage component can be connected to the connector to power the storage component.   
     
     
         27 . The printed circuit board of  claim 26 , wherein the storage component is one of a 2.5″ cased SATA drive, caseless SATA solid state device and an mSATA solid state device. 
     
     
         28 . The printed circuit board of  claim 26  further comprising one of a SATA connector, mSATA connector and a miniSATA connector connected to the storage component through which a set of SATA signals from the storage component are communicated. 
     
     
         29 . The printed circuit board of  claim 26  further comprising one of a SATA connector, mSATA connector and a miniSATA connector connected to the storage component through which a set of SATA signals from the storage component are communicated and the set of SATA signals are routed on the printed circuit board to the PCIe connectors. 
     
     
         30 . The printed circuit board of  claim 28  further comprising a compute component connected to the printed circuit board using a SATA connector and the set of SATA signals are communicated to the compute component. 
     
     
         31 . The printed circuit board of  claim 26  further comprising one or more digital enables that are routable through the PCIe connectors to allow external control of the one or more regulators. 
     
     
         32 . The printed circuit board of  claim 26  further comprising one or more of a power good signal and an acknowledge signal are routable through the PCIe connectors from the one or more regulators. 
     
     
         33 . The printed circuit board of  claim 31  further comprising a compute component connected to the printed circuit board and the compute component controls the digital enables. 
     
     
         34 . The printed circuit board of  claim 26  further comprising a temperature sensor attached to the printed circuit board and a temperature sensor interface is routed through the PCIe connector.

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