Modular routing fabric using switching networks

Abstract

A routing fabric using multiple levels of switching networks along with associated routing matrices to allow for better interconnection or routing path among logic modules or routing modules compared with those in the conventional designs. The resulting routing fabric can be used in electronic devices, such as switching networks, routers, and programmable logic circuits, etc.

What is claimed is: 
     
         1 . A routing fabric in an integrated circuit, comprising:
 a plurality of branches, where each of the plurality of branches comprises at least two consecutive levels of switching networks and a plurality of leaf cells, wherein the lowest level of switching networks of the at least two consecutive levels of switching networks are parental switching networks of the plurality of leaf cells;   a plurality of routing matrices;   wherein each switching network of the at least two consecutive levels of switching networks and each routing matrix of the plurality of routing matrices comprises a first plurality of ports and a second plurality of ports,
 wherein each port of the first plurality of ports and the second plurality of ports of each switching network and each routing matrix comprises a plurality of pins, and
 wherein for each switching network, the pins of the first plurality of ports of the switching network selectively couple to the pins of the second plurality of ports of the switching network through switches of the switching network, and 
 wherein for each routing matrix, the pins of the first plurality of ports of the routing matrix selectively couple to the pins of the second plurality of ports of the routing matrix through switches of the routing matrix; 
 
 wherein the pins of the first plurality of ports of a first routing matrix of the plurality of routing matrices are physically connected to only one type of input being output pins of a plurality of leaf cells of at least two branches of the plurality of branches. 
   
     
     
         2 . The routing fabric of  claim 1 , further comprising at least two first routing matrices of the plurality of routing matrices and a second routing matrix of the plurality of matrices, wherein the pins of the first plurality of ports of the second routing matrix consist of pins selected from the pins of the second plurality of ports of the at least two first routing matrices. 
     
     
         3 . The routing fabric of  claim 2 , wherein the pins of the first plurality of ports of the second routing matrix further consist of pins selected from the output pins of a plurality of leaf cells. 
     
     
         4 . The routing fabric of  claim 3 , wherein the pins of the second plurality of ports of the second routing matrix are physically connected to the pins of the first plurality of ports of the switching networks of at least one level of switching networks of the at least two levels of switching networks of at least two branches. 
     
     
         5 . The routing fabric of  claim 1 , wherein the pins of at least one port of the second plurality of ports of the first routing matrix are physically connected to the pins of at least one port of the first plurality of ports of at least one ancestry switching network of a higher level than the at least two consecutive levels of switching networks of at least one branch of the plurality of branches. 
     
     
         6 . The routing fabric of  claim 1 , wherein a first branch, the first routing matrix and a second branch are organized along a first dimension. 
     
     
         7 . The routing fabric of  claim 6 , wherein the pins of the first plurality of ports of the first routing matrix are physically connected to the output pins of a plurality of leaf cells of a third branch,
 wherein the first branch and the third branch are organized along a second dimension;   wherein the pins of the first plurality of ports of the first routing matrix are physically connected to the output pins of a plurality of leaf cells of a fourth branch,   wherein the second branch and the fourth branch are organized along the second dimension.   
     
     
         8 . A method of routing in an integrated circuit, comprising:
 providing a plurality of branches, where each of the plurality of branches comprises at least two consecutive levels of switching networks and a plurality of leaf cells, wherein the lowest level of switching networks of the at least two consecutive levels of switching networks are parental switching networks of the plurality of leaf cells;   providing a plurality of routing matrices;   wherein each switching network of the at least two consecutive levels of switching networks and each routing matrix of the plurality of routing matrices comprises a first plurality of ports and a second plurality of ports,
 wherein each port of the first plurality of ports and the second plurality of ports of each switching network and each routing matrix comprises a plurality of pins, and 
   selectively coupling, for each switching network, the pins of the first plurality of ports of the switching network to the pins of the second plurality of ports of the switching network through switches of the switching network, and   selectively coupling, for each routing matrix, the pins of the first plurality of ports of the routing matrix to the pins of the second plurality of ports of the routing matrix through switches of the routing matrix;   physically connecting the pins of the first plurality of ports of a first routing matrix of the plurality of routing matrices to only one type of input being output pins of a plurality of leaf cells of at least two branches of the plurality of branches.   
     
     
         9 . The method of  claim 8 , wherein the integrated circuit further comprises at least two first routing matrices of the plurality of routing matrices and a second routing matrix of the plurality of matrices, and wherein the pins of the first plurality of ports of the second routing matrix consist of pins selected from the pins of the second plurality of ports of the at least two first routing matrices. 
     
     
         10 . The method of  claim 9 , wherein the pins of the first plurality of ports of the second routing matrix further consist of pins selected from the output pins of a plurality of leaf cells. 
     
     
         11 . The method of  claim 10 , further comprising physically connecting the pins of the second plurality of ports of the second routing matrix to the pins of the first plurality of ports of the switching networks of at least one level of switching networks of the at least two levels of switching networks of at least two branches. 
     
     
         12 . The method of  claim 8 , further comprising physically connecting the pins of at least one port of the second plurality of ports of the first routing matrix to the pins of at least one port of the first plurality of ports of at least one ancestry switching network of a higher level than the at least two consecutive levels of switching networks of at least one branch of the plurality of branches. 
     
     
         13 . The method of  claim 8 , wherein a first branch of the plurality of branches, the first routing matrix and a second branch of the plurality of branches are organized along a first dimension. 
     
     
         14 . The method of  claim 13 , further comprising:
 physically connecting the pins of the first plurality of ports of the first routing matrix to the output pins of a plurality of leaf cells of a third branch, wherein the first branch and the third branch are organized along a second dimension; and   physically connecting the pins of the first plurality of ports of the first routing matrix to the output pins of a plurality of leaf cells of a fourth branch, wherein the second branch and the fourth branch are organized along the second dimension.   
     
     
         15 . A non-transitory computer readable storage medium having instructions stored therein, that, when executed by a computer system, cause the computer system to perform operations comprising:
 providing a plurality of branches, where each of the plurality of branches comprises at least two consecutive levels of switching networks and a plurality of leaf cells, wherein the lowest level of switching networks of the at least two consecutive levels of switching networks are parental switching networks of the plurality of leaf cells;   providing a plurality of routing matrices;   wherein each switching network of the at least two consecutive levels of switching networks and each routing matrix of the plurality of routing matrices comprises a first plurality of ports and a second plurality of ports,
 wherein each port of the first plurality of ports and the second plurality of ports of each switching network and each routing matrix comprises a plurality of pins, and 
   selectively coupling, by the computer system, for each switching network, the pins of the first plurality of ports of the switching network to the pins of the second plurality of ports of the switching network through switches of the switching network, and   selectively coupling, by the computer system, for each routing matrix, the pins of the first plurality of ports of the routing matrix to the pins of the second plurality of ports of the routing matrix through switches of the routing matrix;   physically connecting, by the computer system, the pins of the first plurality of ports of a first routing matrix of the plurality of routing matrices to only one type of input being output pins of a plurality of leaf cells of at least two branches of the plurality of branches.   
     
     
         16 . The non-transitory computer readable storage medium of  claim 15 , wherein the integrated circuit further comprises at least two first routing matrices of the plurality of routing matrices and a second routing matrix of the plurality of matrices, and wherein the pins of the first plurality of ports of the second routing matrix consist of pins selected from the pins of the second plurality of ports of the at least two first routing matrices. 
     
     
         17 . The non-transitory computer readable storage medium of  claim 16 , wherein the pins of the first plurality of ports of the second routing matrix further consist of pins selected from the output pins of a plurality of leaf cells. 
     
     
         18 . The non-transitory computer readable storage medium of  claim 17 , wherein the operations further comprise physically connecting the pins of the second plurality of ports of the second routing matrix to the pins of the first plurality of ports of the switching networks of at least one level of switching networks of the at least two levels of switching networks of at least two branches. 
     
     
         19 . The non-transitory computer readable storage medium of  claim 15 , wherein the operations further comprising physically connecting the pins of at least one port of the second plurality of ports of the first routing matrix to the pins of at least one port of the first plurality of ports of at least one ancestry switching network of a higher level than the at least two consecutive levels of switching networks of at least one branch of the plurality of branches. 
     
     
         20 . The non-transitory computer readable storage medium of  claim 15 , wherein a first branch of the plurality of branches, the first routing matrix and a second branch of the plurality of branches are organized along a first dimension. 
     
     
         21 . The non-transitory computer readable storage medium of  claim 20 , wherein the operations further comprise:
 physically connecting the pins of the first plurality of ports of the first routing matrix to the output pins of a plurality of leaf cells of a third branch, wherein the first branch and the third branch are organized along a second dimension; and   physically connecting the pins of the first plurality of ports of the first routing matrix to the output pins of a plurality of leaf cells of a fourth branch, wherein the second branch and the fourth branch are organized along the second dimension.