US2013096882A1PendingUtilityA1

Data acquisition system for test and measurement signals

Assignee: LOUISE JUSTIN RALPHPriority: Mar 31, 2008Filed: Sep 14, 2012Published: Apr 18, 2013
Est. expiryMar 31, 2028(~1.7 yrs left)· nominal 20-yr term from priority
G01R 13/0272G06F 15/00
45
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A system having an acquisition device for acquiring test and measurement data. For each input data signal, the acquisition device has two differential receivers of opposite polarity each having an output coupled to the input of different ones of two pairs of registers, resulting in four registers sampling the input data signal periodically at four different times in accordance with two clocking signals of different phase (phase shifted) 90° to provide a sampling rate four times the rate of the clocking signals. The resulting sample data is stored in memory along with downsampled data. A computer system can request readout of stored sample data and/or downsampled data during or after acquisition of sample data and downsampled data. The acquisition device preferably utilizes an FPGA to provide sampling, storage and readout of stored data. The FPGA may be reconfigurable to provide one of different data acquiring modes selectable by a user.

Claims

exact text as granted — not AI-modified
1 - 26 . (canceled) 
     
     
         27 . A system for acquiring and reading out test and measurement signals comprising:
 a computer system;   an acquisition device having a Field Programmable Gate Array (FPGA) for sampling signals and storing data representative of said sample signals, in which said FPGA operates in accordance with configuration and settings at the FPGA defining FPGA operation; and   said computer system has memory storing a plurality of FPGA configurations in which each of said plurality of FPGA configurations when applied to said FPGA reconfigures said FPGA to enable a plurality of different modes of operation of said acquisition device in accordance with one or more user selectable characteristics of the acquisition device operation, and said computer system in response to user selection of said one or more characteristics of the acquisition device operation automatically determines which one of said stored plurality of FPGA configurations provides said selected one or more characteristics of acquisition device operation and automatically transfers the determined one of said FPGA configurations to the acquisition device which when applied to the FPGA reconfigures the FPGA to enable one of said plurality of different modes of the acquisition device operation for said selected one or more characteristics without affecting user operation of the acquisition device so that said transfer and reconfiguration of the FPGA occurs seamlessly and unobtrusively to the user.   
     
     
         28 . The system according to  claim 27  wherein said computer system has memory storing current settings of the acquisition device, and after said FPGA configuration is updated, said settings are transferred from said memory of said computer system to said acquisition device to restore the settings of the FPGA. 
     
     
         29 . (canceled) 
     
     
         30 . The system according to  claim 27  wherein each of said plurality of FPGA configurations represents a subset of different ones of said one or characteristics. 
     
     
         31 . The system according to  claim 27  wherein said one or more characteristics represents one or more of sample rate, number of channels, or trigger type.

Join the waitlist — get patent alerts

Track US2013096882A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.