Lightweight and compact through-silicon via stack package with excellent electrical connections and method for manufacturing the same

Abstract

A through-silicon via stack package contains package units. Each package unit includes a semiconductor chip; a through-silicon via formed in the semiconductor chip; a first metal line formed on an upper surface and contacting a portion of a top surface of the through-silicon via; and a second metal line formed on a lower surface of the semiconductor chip and contacting a second portion of a lower surface of the through-silicon via. When package units are stacked, the second metal line formed on the lower surface of the top package unit and the first metal line formed on the upper surface of the bottom package unit are brought into contact with the upper surface of the through-silicon via of the bottom package unit and the lower surface of the through-silicon via of the top package unit, respectively. The stack package is lightweight and compact, and can form excellent electrical connections.

What is claimed is: 
     
         1 . A through-silicon via stack package comprising:
 at least two package units stacked upon each other wherein the top package unit among any two stacked package units is referred to as “the upper stacked package unit” and wherein the lower package unit among any two stacked package units is referred to as “the lower stacked package unit,” each package unit comprising:
 a semiconductor chip having an upper surface and a lower surface; 
 at least one through-silicon via formed between the upper surface and the lower surface of the semiconductor chip, wherein each through-silicon via is filled with a conductive material; 
 a first metal line formed at least on a portion of the upper surface of the semiconductor chip to be brought into contact with a portion of the conductive material filled in the through-silicon via; and 
 a second metal line formed at least on the lower surface of the semiconductor chip to be brought into contact with a portion of the conductive material filled in the through-silicon via, 
   wherein one upper stacked package unit and one lower stacked package unit are stacked such that the second metal line formed on the lower surface of the upper stacked package unit is disposed over the conductive material filled in the through silicon via of the lower stacked package unit, and such that the first metal line formed on the upper surface of the lower stacked package unit is disposed below the conductive material filled in the through-silicon via of the upper stacked package unit, and   wherein the first metal line formed, on the upper surface of the lower stacked package unit is arranged with the second metal line formed on the lower surface of the upper stacked package unit such that the first and second metal lines are arranged to be offset each other.   
     
     
         2 . The through-silicon via stack package according to  claim 1 , wherein the conductive material filled in the through-silicon via and the first and second metal lines include one of copper (Cu), aluminum (Al), tin (Sn), nickel (Ni), aurum (Au), and alloys thereof. 
     
     
         3 . The through-silicon via stack package according to  claim 1 , wherein the first metal line and the through-silicon via are formed integrally with each other. 
     
     
         4 . The through-silicon via stack package according to  claim 1 , wherein the first and second metal lines are formed to a same thickness. 
     
     
         5 . The through-silicon via stack package according to  claim 1 ,
 wherein the second metal line formed on the lower surface of the upper stack package unit is electrically connected to the is conductive material of the through-silicon via of the lower stacked package unit using solder, and   wherein the first metal line formed on the upper surface of the lower stack package unit is electrically connected to the conductive material of the through-silicon via of the upper stacked package unit using solder.   
     
     
         6 . The through-silicon via stack package according to  claim 1 , further comprising a filler material filled between any two stacked package units, excluding the area occupied by the first and second metal lines. 
     
     
         7 . The through-silicon via stack package according to  claim 1 , further comprising a capping layer formed on the upper surface of the uppermost stacked package unit.