Semiconductor device and method of manufacture thereof

Abstract

A semiconductor device includes an insulating substrate, a wiring pattern formed on the insulating substrate, a semiconductor chip secured to the wiring pattern, a junction terminal formed of the same material as the wiring pattern and electrically connected to the semiconductor chip, one end of the junction terminal being secured to the insulating substrate, the other end of the junction terminal extending upward away from the insulating substrate, and a control circuit for transmitting a control signal for the semiconductor chip, the control circuit being electrically connected to the junction terminal.

What is claimed is: 
     
         1 . A semiconductor device comprising:
 an insulating substrate;   a wiring pattern formed on said insulating substrate;   a semiconductor chip secured to said wiring pattern;   a junction terminal formed of the same material as said wiring pattern and electrically connected to said semiconductor chip, one end of said junction terminal being secured to said insulating substrate, the other end of said junction terminal extending upward away from said insulating substrate; and   a control circuit for transmitting a control signal for said semiconductor chip, said control circuit being electrically connected to said junction terminal.   
     
     
         2 . The semiconductor device according to  claim 1 , further comprising:
 a power terminal formed of the same material as said wiring pattern and electrically connected to said semiconductor chip, one end of said power terminal being secured to said insulating substrate, the other end of said power terminal extending upward away from said insulating substrate.   
     
     
         3 . A semiconductor device comprising:
 an insulating substrate;   a wiring pattern formed on said insulating substrate and including a first wiring pattern, a second wiring pattern, and a third wiring pattern;   a semiconductor chip secured to said first wiring pattern;   a junction terminal electrically connected to said semiconductor chip, one end of said junction terminal being embedded in said second wiring pattern, the other end of said junction terminal extending upward away from said insulating substrate;   a control circuit for transmitting a control signal for said semiconductor chip, said control circuit being electrically connected to said junction terminal; and   a power terminal electrically connected to said semiconductor chip, one end of said power terminal being embedded in said third wiring pattern, the other end of said power terminal extending upward away from said insulating substrate.   
     
     
         4 . The semiconductor device according to  claim 1 , further comprising a control circuit wiring pattern formed of the same material as said wiring pattern and provided on said insulating substrate, wherein said control circuit is secured to said control circuit wiring pattern. 
     
     
         5 . The semiconductor device according to  claim 2 , further comprising:
 a bottom surface pattern formed on a bottom surface of said insulating substrate; and   a molded resin covering said insulating substrate, said wiring pattern, said semiconductor chip, said junction terminal, said control circuit, and said power terminal, and outwardly exposing said other end of said junction terminal, said other end of said power terminal, and the surface of said bottom surface pattern opposite that in contact with said insulating substrate.   
     
     
         6 . The semiconductor device according to  claim 2 , further comprising:
 a bottom surface pattern formed on a bottom surface of said insulating substrate;   an adhesive primer formed on a surface of said wiring pattern and a surface of said insulating substrate; and   a molded resin covering said insulating substrate, said wiring pattern, said primer, said semiconductor chip, said junction terminal, said control circuit, and said power terminal, and outwardly exposing said other end of said junction terminal, said other end of said power terminal, and the surface of said bottom surface pattern opposite that in contact with said insulating substrate.   
     
     
         7 . The semiconductor device according to  claim 5 , wherein the coefficient of linear expansion of said molded resin is equal to that of said wiring pattern. 
     
     
         8 . The semiconductor device according to  claim 1 , wherein said semiconductor chip is formed of a wide bandgap semiconductor. 
     
     
         9 . The semiconductor device according to  claim 8 , wherein said wide bandgap semiconductor is silicon carbide, gallium nitride-based material, or diamond. 
     
     
         10 . A method of manufacturing a semiconductor device, comprising:
 a step of placing an insulating substrate in a mold having a wiring pattern-forming cavity for forming a wiring pattern on said insulating substrate and also having a junction terminal-forming cavity for forming a junction terminal extending upward from said insulating substrate;   an aluminum pouring step of pouring aluminum into said wiring pattern-forming cavity and said junction terminal-forming cavity; and   a step of cooling said aluminum.   
     
     
         11 . The method according to  claim 10 , wherein:
 said mold has a power terminal-forming cavity for forming a power terminal extending upward from said insulating substrate; and   said aluminum pouring step includes pouring aluminum into said power terminal-forming cavity.