Size-filtered multimetal structures

Abstract

A size-filtered metal interconnect structure allows formation of metal structures having different compositions. Trenches having different widths are formed in a dielectric material layer. A blocking material layer is conformally deposited to completely fill trenches having a width less than a threshold width. An isotropic etch is performed to remove the blocking material layer in wide trenches, i.e., trenches having a width greater than the threshold width, while narrow trenches, i.e., trenches having a width less than the threshold width, remain plugged with remaining portions of the blocking material layer. The wide trenches are filled and planarized with a first metal to form first metal structures having a width greater than the critical width. The remaining portions of the blocking material layer are removed to form cavities, which are filled with a second metal to form second metal structures having a width less than the critical width.

1 . A structure comprising:
 a dielectric layer located on a substrate;   a first metallic structure comprising a first metallic portion including a first metallic material and embedded in said dielectric layer; and   a second metallic structure comprising a second metallic portion including a second metallic material different from said first metallic material and embedded in said dielectric layer.   
     
     
         2 . The structure of  claim 1 , wherein a topmost surface of said first metal structure is coplanar with a topmost surface of said second metal structure. 
     
     
         3 . The structure of  claim 1 , wherein said first metallic structure further comprises at least one first metallic liner having first outer sidewalls contacting said dielectric layer and first inner sidewalls contacting said first metallic portion, and said second metallic structure further comprises at least one second metallic liner having second outer sidewalls contacting said dielectric layer and second inner sidewalls contacting said second metallic portion. 
     
     
         4 . The structure of  claim 1 , wherein a sidewall of said first metallic structure is in direct contact with a sidewall of said second metallic structure. 
     
     
         5 . The structure of  claim 1 , wherein, for each point within said second metallic structure, a minimum distance to outer sidewall surfaces of said second metallic structure is not greater than one half of a threshold distance, and said first metallic structure includes at least one point located at a distance of more than one half of said threshold distance from any outer sidewall surface of said first metallic structure. 
     
     
         6 . A structure comprising an electrically programmable fuse (eFuse), wherein said eFuse is embedded in a dielectric layer located on a substrate and comprises an assembly of a metallic anode, a metallic fuselink, and a metallic cathode, said metallic anode comprises a first metallic portion including a first metallic material, and said metallic cathode comprises a second metallic portion including said first metallic material, and said metallic fuselink contacts said metallic anode and said metallic cathode and comprises a third metallic portion including a second metallic material different from said first metallic material. 
     
     
         7 . The structure of  claim 6 , wherein topmost surfaces of said metallic fuselink, said metallic anode, and said metallic cathode are coplanar. 
     
     
         8 . The structure of  claim 6 , wherein said metallic anode further comprises at least one first metallic liner having first outer sidewalls contacting said dielectric layer and first inner sidewalls contacting said first metallic portion, said metallic cathode further comprises at least one second metallic liner having second outer sidewalls contacting said dielectric layer and second inner sidewalls contacting said second metallic portion, and said metallic fuselink further comprises at least one third metallic liner having third outer sidewalls contacting said dielectric layer and third inner sidewalls contacting said third metallic portion. 
     
     
         9 . The structure of  claim 6 , wherein said first metallic material has greater resistance to electromigration than said second metallic material. 
     
     
         10 . The structure of  claim 6 , wherein, for each point within said metallic fuselink, a minimum distance to outer sidewall surfaces of said metallic fuselink is not greater than one half of a threshold distance, said metallic anode includes at least one point located at a distance of more than one half of said threshold distance from any outer sidewall surface of said metallic anode, and said metallic cathode includes at least one point located at a distance of more than one half of said threshold distance from any outer sidewall surface of said metallic cathode. 
     
     
         11 . A method of forming a structure, said method comprising:
 forming a first trench having a width greater than a threshold distance and a second trench having a width not greater than said threshold distance in a dielectric layer located on a substrate;   forming a blocking material layer in said first trench and said second trench;   removing said blocking material layer from within said first trench while said second trench is filled with a remaining portion of said blocking material layer;   filling said first trench with a first metallic material and planarizing said first metallic material to form a first metallic structure within said first trench;   removing said remaining portion of said blocking material layer selective to said dielectric material layer; and   filling said second trench with a second metallic material different from said first metallic material and planarizing said second metallic material to form a second metallic structure within said second trench.   
     
     
         12 . The method of  claim 11 , wherein a top surface of said second metallic structure is coplanar with a top surface of said first metallic structure after planarization of said second metallic material. 
     
     
         13 . The method of  claim 11 , wherein said blocking material layer is deposited conformally with a thickness that is greater than one half of said threshold distance. 
     
     
         14 . The method of  claim 11 , wherein a dielectric hard mask layer having a greater resistance to abrasion than said dielectric layer is deposited on said dielectric layer prior to formation of said first and second trenches, and said first metallic material and said second metallic material are planarized employing said dielectric hard mask layer as a stopping layer. 
     
     
         15 . The method of  claim 11 , wherein said blocking material layer includes a material selected from parylene, organosilicate glass, silicon oxide, silicon nitride, at least one elemental semiconductor material, and at least one compound semiconductor material. 
     
     
         16 . A method of forming an electrically programmable fuse (eFuse), said method comprising:
 forming an integrated trench including a first trench, a second trench, and a third trench connected to said first and second trenches, wherein said first and second trenches have widths greater than a threshold distance and said third trench has a width not greater than said threshold distance in a dielectric layer located on a substrate;   forming a blocking material layer in said first, second, and third trenches;   removing said blocking material layer from within said first and second trenches while said third trench is filled with a remaining portion of said blocking material layer;   filling said first and second trenches with a first metallic material and planarizing said first metallic material to form a metallic anode within said first trench and a metallic cathode within said second trench;   removing said remaining portion of said blocking material layer selective to said dielectric material layer; and   filling said third trench with a second metallic material different from said first metallic material and planarizing said second metallic material to form a metallic fuselink within said second trench, wherein said metallic anode, said metallic cathode, and said metallic fuselink collectively constitute an eFuse.   
     
     
         17 . The method of  claim 16 , wherein a top surface of said metallic fuselink is coplanar with top surfaces of said metallic anode and said metallic cathode after planarization of said second metallic material. 
     
     
         18 . The method of  claim 16 , wherein said blocking material layer is deposited conformally with a thickness that is greater than one half of said threshold distance. 
     
     
         19 . The method of  claim 16 , wherein a dielectric hard mask layer having a greater resistance to abrasion than said dielectric layer is deposited on said dielectric layer prior to formation of said first, second, and third trenches, and said first metallic material and said second metallic material are planarized employing said dielectric hard mask layer as a stopping layer. 
     
     
         20 . The method of  claim 16 , wherein said blocking material layer includes a material selected from parylene, organosilicate glass, silicon oxide, silicon nitride, at least one elemental semiconductor material, and at least one compound semiconductor material.