Image sensor with improved black level calibration
Abstract
An imaging system capable of black level calibration includes an imaging pixel array, at least one black reference pixel, and peripheral circuitry. The imaging pixel array includes a plurality of active pixels each coupled to capture image data. The black reference pixel is coupled to generate a black reference signal for calibrating the image data. Light transmitting layers are disposed on a first side of a pixel array die including the imaging system and cover at least the imaging pixel array and the black reference pixel. A light shielding layer is disposed on the first side of the pixel array die and covers a portion of the light transmitting layers and the black reference pixel without covering the imaging pixel array.
Claims
exact text as granted — not AI-modified1 . An imaging system, comprising:
an imaging pixel array integrated on a pixel array die, the imaging pixel array including a plurality of active pixels each coupled to capture image data; at least one black reference pixel integrated on the pixel array die, the at least one black reference pixel coupled to generate a black reference signal for calibrating the image data; peripheral circuitry integrated on the pixel array die, the peripheral circuitry coupled to receive the image data and the black reference signal; light transmitting layers disposed on a first side of the pixel array die and covering the imaging pixel array, the at least one black reference pixel, and the peripheral circuitry; a color filter layer disposed on a first portion of the light transmitting layers and covering the imaging pixel array; an array of microlenses disposed on the color filter layer and aligned with the imaging pixel array; and a light shielding layer disposed on the first side of the pixel array die and covering at least a portion of the light transmitting layers and the at least one black reference pixel without covering the imaging pixel array.
2 . The imaging system of claim 1 , wherein the light shielding layer comprises at least one of an opaque polymer material, an opaque organic material, or an opaque inorganic material.
3 . The imaging system of claim 1 , wherein the light shielding layer extends to further cover the peripheral circuitry.
4 . The imaging system of claim 2 , wherein the light shielding layer is disposed directly on a second portion of the light transmitting layers covering the at least one black reference pixel and wherein the color filter layer does not cover the at least one black reference pixel.
5 . The imaging system of claim 4 , wherein the color filter layer is not disposed between the light shielding layer and the light transmitting layers.
6 . The imaging system of claim 2 , wherein the color filter layer extends to further cover the at least one black reference pixel and the peripheral circuitry and wherein a portion of the color filter layer is disposed between the light shielding layer and the light transmitting layers.
7 . The imaging system of claim 1 , wherein the imaging system comprises a complementary metal-oxide-semiconductor (“CMOS”) backside illuminated imaging system and wherein the first side comprises a backside of the pixel array die.
8 . The imaging system of claim 1 , wherein the light shielding layer is disposed directly on one of the antireflective layers and wherein the light shielding layer is patterned and etched using a wet etching process.
9 . The imaging system of claim 1 , wherein the peripheral circuitry includes readout circuitry coupled to readout the imaging data from the imaging pixel array and control circuitry for controlling operation of the imaging pixel array.
10 . The imaging system of claim 1 , wherein the light transmitting layers comprise first and second antireflective layers.
11 . The imaging system of claim 1 , wherein the at least one black reference pixel comprises an array of dark pixels disposed on a portion of the pixel array die adjacent to the imaging pixel array.
12 . The imaging system of claim 7 , further comprising
pixel circuitry disposed within the imaging pixel array; and a metal stack disposed on a front side of the pixel array die, the metal stack including at least two metal layers for redistributing signals over the imaging pixel array, wherein the peripheral circuitry includes black level calibration logic coupled to receive the image data and the black reference signal, the black level calibration logic coupled to level correct the image data based at least in part on the black reference signal.
13 . The imaging system of claim 2 , wherien the light shielding layer is between 1 micron and 3 microns thick.Join the waitlist — get patent alerts
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