Apparatus and method for reducing common-mode error

Abstract

Apparatus and methods reduce common-mode error. An integrated circuit includes a plurality of signal channels, a first proxy channel, and a subtraction block. The signal channels are configured to receive a plurality of input signals and to generate a plurality of output signals, and each of the signal channels has a substantially similar circuit topology. The first proxy channel has a substantially similar circuit topology as the plurality of signal channels, and includes an output that can vary in relation to a common-mode error of the signal channels. The subtraction block is configured to generate a plurality of modified output signals by using the output of the first proxy channel to reduce the common-mode error of the plurality of output signal channels.

1 . An apparatus, comprising:
 an integrated circuit (IC) comprising:
 a plurality of signal channels configured to receive a plurality of input signals and to process the plurality of input signals to generate a plurality of output signals, wherein each of the plurality of signal channels has a substantially similar circuit topology to one another; 
 a first proxy channel having a substantially similar circuit topology as the plurality of signal channels, wherein the first proxy channel is configured to generate a proxy output signal that is associated with a common-mode noise of the plurality of signal channels; and 
 a subtraction block configured to subtract the proxy output signal from the plurality of output signals to generate a plurality of modified output signals such that a common-mode error of the plurality of modified output signals is reduced. 
   
     
     
         2 . The apparatus of  claim 1 , wherein the first proxy channel and each of the plurality of signal channels further comprise an amplifier electrically connected to a power supply voltage, wherein the proxy output signal further comprises a component associated with a common-mode noise of the power supply, and wherein the subtraction block is configured to subtract out the common-mode noise of the power supply from each of the plurality of output signals to generate the plurality of modified output signals. 
     
     
         3 . The apparatus of  claim 2 , further comprising a bias circuit for biasing each of the amplifiers and a reference circuit for generating a reference voltage for the amplifiers, wherein the proxy output signal further comprises a component associated with a common-mode noise of the bias circuit and the reference circuit, and wherein the subtraction block is configured to subtract out the common-mode noise of the bias and reference circuits from each of the plurality of output signals to generate the plurality of modified output signals. 
     
     
         4 . The apparatus of  claim 1 , wherein the first proxy channel and each of the plurality of signal channels have substantially the same circuit layout, wherein the proxy output signal further comprises a component associated with a systematic offset of the circuit layout, and wherein the subtraction block is configured to subtract out the systematic offset from each of the plurality of output signals to generate the plurality of modified output signals. 
     
     
         5 . The apparatus of  claim 1 , further comprising a plurality of pads disposed on the surface of the IC and configured to receive the plurality of input signals. 
     
     
         6 . The apparatus of  claim 5 , further comprising a plurality of photodetectors electrically coupled to the plurality of pads, the plurality of photodetectors configured to generate the plurality of input signals. 
     
     
         7 . The apparatus of  claim 6 , wherein the first proxy channel and each of the plurality of signal channels includes an electrical circuit configured to integrate the plurality of input signals from the photodetectors to generate the plurality of output signals. 
     
     
         8 . The apparatus of  claim 7 , wherein the first proxy channel and each of the plurality of signal channels includes a capacitor and an amplifier having a non-inverting input, an inverting input, and an output, the capacitor electrically connected between the inverting input and the output. 
     
     
         9 . The apparatus of  claim 1 , further comprising at least one additional proxy channel and a random noise reduction block, wherein each of the at least one additional proxy channel includes a proxy output signal, and wherein the random noise reduction block configured to generate a random noise-reduced proxy output signal using the proxy output signal of the first proxy channel and the proxy output signal of each of the at least one additional proxy channel, and wherein the subtraction block is configured to generate the plurality of modified output signals by subtracting the random noise-reduced proxy output signal from each of the plurality of output signals. 
     
     
         10 . The apparatus of  claim 9 , wherein the random noise reduction block is configured to average the proxy output signal from the first proxy channel and the proxy output signal of each of the at least one additional proxy channel to generate the random noise-reduced proxy signal. 
     
     
         11 . The apparatus of  claim 1 , wherein the subtraction block comprises a switched capacitor circuit including a plurality of switches and a plurality of capacitors, the switched capacitor circuit configured to charge each of the plurality of capacitors so as to generate a plurality of voltages equal to about a difference between the plurality of output signals and the proxy output signal of the first proxy channel. 
     
     
         12 . The apparatus of  claim 1 , wherein the subtraction block comprises an analog-to-digital converter and a processor, the subtraction block configured to use the analog-to-digital converter to convert the proxy output signal of the first proxy channel and the plurality of output signals to digital data, and wherein the processor is configured to process the digital data to generate the plurality of modified output signals. 
     
     
         13 . The apparatus of  claim 12 , wherein the subtraction block further comprises at least one multiplexer for multiplexing the proxy output signal of the first proxy channel and the plurality of output signals to generate at least one serial data stream. 
     
     
         14 . The apparatus of  claim 1 , wherein the plurality of signal channels are configured to receive the plurality of input signals from one or more image sensors. 
     
     
         15 . A method of reducing common-mode error, the method comprising:
 processing a plurality of input signals using a plurality of signal channels to generate a plurality of output signals, wherein each of the plurality of signal channels comprises substantially similar electrical circuitry to each other;   generating a proxy output signal using a first proxy channel that comprises substantially similar electrical circuitry as the plurality of signal channels, wherein the proxy output signal is associated with a common-mode noise of the plurality of signal channels; and   generating a plurality of modified output signals by using the proxy output signal from the first proxy channel to modify the plurality of output signals such that a common-mode error is reduced.   
     
     
         16 . The method of  claim 15 , wherein the proxy output signal further comprises a component associated with a systematic offset of the substantially similar electrical circuitry, wherein generating the plurality of modified output signals further comprises subtracting out the systematic offset from each of the plurality of output signals. 
     
     
         17 . The method of  claim 15 , further comprising generating at least one additional proxy output signal using at least one additional proxy channel that comprises substantially similar electrical circuitry as the plurality of signal channels. 
     
     
         18 . The method of  claim 17 , further comprising generating a random noise-reduced proxy signal by averaging the proxy signal output from the first proxy channel and each of the at least one additional proxy output signal from the at least one additional proxy channel, wherein generating the plurality of modified output signals further comprises subtracting the random noise-reduced proxy signal from each of the plurality of output signals. 
     
     
         19 . The method of  claim 15 , further comprising receiving the plurality of signal channels from one or more image sensors. 
     
     
         20 . An apparatus, comprising:
 an integrated circuit (IC) comprising:
 a plurality of signal channels configured to receive a plurality of input signals and to process the plurality of input signals to generate a plurality of output signals, wherein each of the plurality of signal channels has a substantially similar circuit topology to one another; 
 a proxy channel having a substantially similar circuit topology as the plurality of signal channels, wherein the proxy channel is configured to generate a proxy output signal that is associated with a common-mode noise of the plurality of signal channels; and 
 a means for subtracting the proxy output signal from the plurality of output signals to generate a plurality of modified output signals such that a common-mode error of the plurality of modified output signals is reduced. 
   
     
     
         21 . An apparatus, comprising:
 an integrated circuit (IC) comprising:
 a signal channel configured to receive an input signal and to process the input signal to generate an output signal; 
 a proxy channel having a substantially similar circuit topology as the signal channel, wherein the proxy channel is configured to generate a proxy output signal that is associated with a common-mode noise of the signal channel; and 
 a subtraction block configured to subtract the proxy output signal from the output signal to generate a modified output signal such that a common-mode error of the modified output signal is reduced. 
   
     
     
         22 . The apparatus of  claim 21 , wherein the proxy channel and the signal channel each further comprise an amplifier electrically connected to a power supply voltage, wherein the proxy output signal further comprises a component associated with a common-mode noise of the power supply, and wherein the subtraction block is configured to subtract out the common-mode noise of the power supply from the output signal to generate the modified output signal. 
     
     
         23 . The apparatus of  claim 22 , further comprising a bias circuit for biasing each of the amplifiers and a reference circuit for generating a reference voltage for the amplifiers, wherein the proxy output signal further comprises a component associated with a common-mode noise of the bias circuit and the reference circuit, and wherein the subtraction block is configured to subtract out the common-mode noise of the bias and reference circuits from the output signal to generate the modified output signal. 
     
     
         24 . The apparatus of  claim 21 , wherein the proxy channel and the signal channel have substantially the same circuit layout, wherein the proxy output signal further comprises a component associated with a systematic offset of the circuit layout, and wherein the subtraction block is configured to subtract out the systematic offset from the output signal to generate the modified output signal. 
     
     
         25 . The apparatus of  claim 21 , further comprising a pad disposed on the surface of the IC and configured to receive the input signal. 
     
     
         26 . The apparatus of  claim 21 , further comprising a photodetector electrically coupled to the pad, the photodetector configured to generate the input signal.