US2013009320A1PendingUtilityA1

Semiconductor package and method of manufacturing the same

Assignee: SAMSUNG ELECTRO MECHPriority: Jul 7, 2011Filed: Sep 23, 2011Published: Jan 10, 2013
Est. expiryJul 7, 2031(~4.9 yrs left)· nominal 20-yr term from priority
H10P 54/00H10W 90/754H10W 90/732H10W 90/724H10W 90/00H10W 74/01H10W 74/00H10W 72/9413H10W 72/884H10W 72/29H10W 44/251H10W 44/248H10W 44/209H10W 74/127H10W 74/019H10W 74/016H10W 74/014H10W 72/0198H10W 70/685H10W 70/635H10W 70/614H10W 70/095H10W 70/093H10W 70/65H10W 70/09H10W 70/05H10W 20/42H10W 72/00H10W 44/20H10W 70/60H01Q 1/2283H05K 1/185H05K 2203/061H01Q 1/24
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Claims

Abstract

There are provided a semiconductor package including an antenna formed integrally therewith, and a method of manufacturing the same. The semiconductor package includes: a semiconductor chip; a sealing part sealing the semiconductor chip; a substrate part formed on at least one surface of the sealing part; and an antenna part formed on the sealing part or the substrate part and electrically connected to the semiconductor chip.

Claims

exact text as granted — not AI-modified
1 . A semiconductor package comprising:
 a semiconductor chip;   a sealing part sealing the semiconductor chip;   a substrate part formed on at least one surface of the sealing part; and   an antenna part formed on the sealing part or the substrate part and electrically connected to the semiconductor chip.   
     
     
         2 . The semiconductor package of  claim 1 , further comprising a via connection part penetrating through the sealing part,
 wherein the antenna part and the semiconductor chip are electrically connected to each other through the via connection part.   
     
     
         3 . The semiconductor package of  claim 1 , wherein the substrate part includes:
 an upper substrate formed on an upper surface of the sealing part; and   a lower substrate formed on a lower surface of the sealing part.   
     
     
         4 . The semiconductor package of  claim 3 , wherein the antenna part is formed on an outer surface of the upper substrate. 
     
     
         5 . The semiconductor package of  claim 4 , wherein the upper substrate is a multi-layer substrate, and
 the antenna part includes a plurality of radiators formed on several layers of the upper substrate.   
     
     
         6 . The semiconductor package of  claim 1 , wherein the antenna part is formed on an outer surface of the sealing part. 
     
     
         7 . The semiconductor package of  claim 6 , wherein the antenna part is formed in a groove formed in the outer surface of the sealing part. 
     
     
         8 . The semiconductor package of  claim 1 , wherein the substrate part has fine circuit patterns formed in an inner portion thereof through a semiconductor manufacturing process. 
     
     
         9 . The semiconductor package of  claim 1 , wherein the semiconductor chip transceives a high frequency in a millimeter wave band through the antenna part. 
     
     
         10 . A method of manufacturing a semiconductor package, the method comprising:
 disposing a plurality of semiconductor chips;   forming a sealing part sealing the plurality of semiconductor chips;   forming a substrate part on at least one surface of the sealing part; and   forming an antenna part on the sealing part or the substrate part.   
     
     
         11 . The method of  claim 10 , wherein the disposing of the plurality of semiconductor chips includes arranging semiconductor chips sorted into good products on a carrier. 
     
     
         12 . The method of  claim 11 , wherein the disposing of the plurality of semiconductor chips includes attaching the semiconductor chips to an adhesive layer formed on the carrier. 
     
     
         13 . The method of  claim 10 , wherein the forming of the sealing part includes forming the sealing part using an epoxy mold compound (EMC). 
     
     
         14 . The method of  claim 10 , further comprising, after the forming of the sealing part, forming a via connection part penetrating through the sealing part. 
     
     
         15 . The method of  claim 14 , wherein the forming of the antenna part includes electrically connecting the antenna part and the semiconductor chips through the via connection part. 
     
     
         16 . The method of  claim 10 , wherein the forming of the substrate part includes forming a multi-layer substrate part on each of upper and lower surfaces of the sealing part. 
     
     
         17 . The method of  claim 16 , wherein the forming of the antenna part includes forming a plurality of radiators on several layers of the substrate part. 
     
     
         18 . The method of  claim 10 , wherein the forming of the antenna part includes forming a groove in an outer surface of the sealing part and forming the antenna part therein. 
     
     
         19 . The method of  claim 10 , wherein the forming of the substrate part includes repeatedly forming fine circuit patterns and insulating layers through a semiconductor manufacturing process.

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