Interconnect structure fabricated without dry plasma etch processing

Abstract

An interconnect structure within a microelectronic structure and a method for fabricating the interconnect structure within the microelectronic structure use a developable bottom anti-reflective coating layer and at least one imageable inter-level dielectric layer located thereupon over a substrate that includes a base dielectric layer and a first conductor layer located and formed embedded within the base dielectric layer. Incident to use of the developable bottom anti-reflective coating layer and the at least one imageable inter-level dielectric layer, an aperture, such as but not limited to a dual damascene aperture, may be formed through the at least one imageable inter-level dielectric layer and the developable anti-reflective coating layer to expose a capping layer located and formed upon the first conductor layer, absent use of a dry plasma etch method when forming the interconnect structure within the microelectronic structure.

1 . A microelectronic structure comprising:
 a first conductor layer located within a base dielectric layer located over a substrate;   a patterned bottom antireflective coating layer located upon the base dielectric layer; and   at least one patterned inter-level dielectric layer located upon the patterned bottom anti-reflective coating layer, wherein:
 the patterned bottom anti-reflective coating layer and the at least one patterned inter-level dielectric layer define an aperture located over the first conductor layer; 
 the patterned bottom anti-reflective coating layer includes an element selected from the group consisting of C, Si, Ge, B, Sn, Fe, Ta, Ti, Ni, Hf and La; and 
 the at least one patterned inter-level dielectric layer comprises a cured organic functionalized silicon containing dielectric material. 
   
     
     
         2 . The microelectronic structure of  claim 1  wherein the substrate comprises a dielectric substrate. 
     
     
         3 . The microelectronic structure of  claim 1  wherein the substrate comprises a semiconductor substrate. 
     
     
         4 . The microelectronic structure of  claim 1  wherein the first conductor layer comprises a copper containing conductor material. 
     
     
         5 . The microelectronic structure of  claim 1  wherein the aperture comprises a damascene aperture. 
     
     
         6 . The microelectronic structure of  claim 1  wherein the aperture comprises a dual damascene aperture. 
     
     
         7 . The microelectronic structure of  claim 1  further comprising a second conductor layer located within the aperture. 
     
     
         8 . The microelectronic structure of  claim 1  wherein the patterned bottom anti-reflective coating layer includes an element selected from the group consisting of Ge, B, Sn, Fe, Ta, Ti, Ni, Hf and La, without Si and without C. 
     
     
         9 . The microelectronic structure of  claim 1  wherein said base dielectric layer has a dielectric constant greater than 4.3 to 20, measured in vacuum, and is selected from the group consisting of silicon oxide dielectric materials, silicon nitride dielectric materials and silicon oxynitride dielectric materials. 
     
     
         10 . The microelectronic structure of  claim 1  wherein said base dielectric layer has a dielectric constant from 1.0 to less than 4.3, measured in vacuum, and is selected from the group consisting of spin-on-glass dielectric materials, spin-on-polymer dielectric materials, micro-porous dielectric materials, nano-porous dielectric materials, carbon doped silicate glass dielectric materials and fluorine doped silicate glass dielectric materials. 
     
     
         11 . A microelectronic structure comprising:
 a first conductor layer located within a base dielectric layer located over a substrate;   a first conductor capping layer located aligned upon the first conductor layer;   a patterned bottom anti-reflective coating layer located upon the base dielectric layer; and   at least one patterned inter-level dielectric layer located upon the patterned bottom anti-reflective coating layer, wherein:
 the patterned bottom anti-reflective coating layer and the at least one patterned inter-level dielectric layer define an aperture that exposes the first conductor capping layer; 
 the developed bottom anti-reflective coating layer includes an element selected from the group consisting of C, Si, Ge, B, Sn, Fe, Ta, Ti, Ni, Hf and La; and 
 the at least one patterned inter-level dielectric layer comprises an organic functionalized silicon containing dielectric material. 
   
     
     
         12 . The microelectronic structure of  claim 11  wherein the first conductor layer is coplanar with the base dielectric layer. 
     
     
         13 . The microelectronic structure of  claim 11  wherein the first conductor capping layer is coplanar with the base dielectric layer. 
     
     
         14 . The microelectronic structure of  claim 11  wherein the patterned bottom anti-reflective coating layer includes an element selected from the group consisting of Ge, B, Sn, Fe, Ta, Ti, Ni, Hf and La. 
     
     
         15 . The microelectronic structure of  claim 11  wherein said base dielectric layer has a dielectric constant greater than 4.3 to 20, measured in vacuum, and is selected from the group consisting of silicon oxide dielectric materials, silicon nitride dielectric materials and silicon oxynitride dielectric materials. 
     
     
         16 . The microelectronic structure of  claim 11  wherein said base dielectric layer has a dielectric constant from 1.0 to less than 4.3, measured in vacuum, and is selected from the group consisting of spin-on-glass dielectric materials, spin-on-polymer dielectric materials, micro-porous dielectric materials, nano-porous dielectric materials, carbon doped silicate glass dielectric materials and fluorine doped silicate glass dielectric materials. 
     
     
         17 . The microelectronic structure of  claim 11  said wherein organic functionalized silicon containing dielectric material includes silicon-containing substituents. 
     
     
         18 . The microelectronic structure of  claim 17  wherein said silicon-containing substituents are selected from the group consisting of are trimethylsilyl alkyl acrylate, trimethylsilyl alkyl methacrylate, trimethylsilyl alkyl itaconate, tris(trimethylsilyl)silyl alkyl acrylate tris(trimethylsilyl)silyl alkyl methacrylate, tris(trimethylsilyl)silyl alkyl itaconate, tris(trimethylsilyloxy)silyl alkyl acrylate, tris(trimethylsilyloxy)silyl alkyl methacrylate, tris(trimethylsilyloxy)silyl alkyl itaconate, alkylsilyl styrene, trimethylsilylmethyl(dimethoxy)silyloxy alkyl acrylate, trimethylsilylmethyl(dimethoxy)silyloxy alkyl methacrylate, trimethylsilylmethyl(dimethoxy)silyloxy alkyl itaconate, trimethylsilyl alkyl norbornene-5-carboxylate alkyl, tris(trimethylsilyl)silyl alkyl norbornene-5-carboxylate and tris(trimethylsilyloxy)silyl alkyl norbornene-5-carboxylate, wherein alkyl is a C 1-5  moiety.