Information processing apparatus and method of controlling same

Abstract

Disclosed is an information processing apparatus equipped with first and second CPUs, as well as a method of controlling this apparatus. When the first CPU launches an operating system for managing a virtual memory area that includes a first cache area for a device, the first CPU generates specification data, which indicates the corresponding relationship between the first cache and a second cache for the device and provided in a main memory, and transfers the specification data to the second CPU. In accordance with the specification data, the second CPU transfers data, which has been stored in the device, to a physical memory corresponding to a cache to which the first CPU refers. As a result, the first CPU accesses the first cache area is thereby capable of accessing the device at high speed.

1 . An information processing apparatus comprising:
 a first storage unit configured to store data;   a second storage unit configured to store data;   a first control unit connected to the first storage unit via a first bus, configured to execute an operating system for managing a virtual memory area that includes a first cache area for the second storage unit, and to access the first cache area to acquire the data that has been stored in the second storage unit;   a second control unit connected to the second storage unit via a second bus, configured to communicate with the first control unit; and   a generation unit configured to generate specification data, which indicates a corresponding relationship between the first cache area and a second cache area that is provided in the first storage unit for the second storage unit, when the operating system is launched;   wherein the first control unit responds to a request from the second control unit by transferring area information, which is indicative of the second cache area, to the second control unit; and   the second control unit transfers the data, which has been stored in the second storage unit, to the second cache area based upon the area information.   
     
     
         2 - 7 . (canceled)