Wafer Level Package For Heat Dissipation And Method Of Manufacturing The Same
Abstract
Disclosed herein are a wafer level package for heat dissipation and a method of manufacturing the same. The wafer level package includes a heat dissipation plate including a cavity and a hole, a die including a pad disposed in the cavity of the heat dissipation plate in a face-up manner, a thermal conductive adhesive disposed between the die and an inner wall of the cavity and disposed in the hole, and a redistribution layer connected at one end to the pad and at the other end extended. The wafer level package protects the die from external environments and enables the die to be easily flush with the heat dissipation plate.
Claims
exact text as granted — not AI-modified1 . A method of manufacturing a wafer level package for heat dissipation, comprising:
(A) attaching a die having a pad to a support plate; (B) forming a cavity and a hole in a heat dissipation plate; (C) attaching the heat dissipation plate to the support plate using a thermal conductive adhesive such that the die is inserted in the cavity of the heat dissipation plate; and (D) removing the support plate and forming a redistribution layer on the die in which the redistribution layer is connected at one end to the pad of the die and at the other end is extended.
2 . The method according to claim 1 , wherein the (A) attaching the die comprises:
(A1) forming an alignment mark on the support plate; (A2) forming a transparent sacrifice layer in a semicured state on the support plate including the alignment mark formed thereon; and (A3) aligning the die using the alignment mark formed on the support plate and attaching the die to the support plate in a face-down manner through the sacrifice layer.
3 . The method according to claim 1 , wherein in the (B) forming the cavity and the hole, the hole is formed through the heat dissipation plate.
4 . The method according to claim 1 , wherein in the (B) forming the cavity and the hole, the hole includes a plurality of holes formed in one package unit having one die.
5 . The method according to claim 1 , wherein in the (B) forming the cavity and the hole, the hole includes holes formed at four corners of the heat dissipation plate respectively, and each of the holes has a sector section.
6 . The method according to claim 5 , wherein each of the holes has a quadrangular section in which adjacent sides of the quadrant, which correspond to a radius of the hole, define a right angle with respect to each other.
7 . The method according to claim 4 , wherein the holes are formed on scribing lines defining the package unit.
8 . The method according to claim 1 , wherein in the (C) attaching the heat dissipation plate, the thermal conductive adhesive is applied onto the die so that the thermal conductive adhesive infiltrates between the die and an inner wall of the cavity and in the hole and thus the heat dissipation plate is attached to the support plate.
9 . The method according to claim 1 , wherein in the (C) attaching the heat dissipation plate, the heat dissipation plate is aligned with the support plate so as to allow the die to be inserted in the cavity, and the thermal conductive adhesive is injected through the hole of the heat dissipation plate so that the thermal conductive adhesive infiltrates between the die and an inner wall of the cavity and in the hole and thus the heat dissipation plate is attached to the support plate.
10 . The method according to claim 9 , wherein the injection of the thermal conductive adhesive is performed while air present between the die and an inner wall of the cavity and in the hole is discharged through another hole through which the injection is not performed.
11 . The method according to claim 1 , further comprising, after the (D) removing the support plate and forming the redistribution layer:
(E) forming a solder resist layer on the die, the solder resist layer having an opening through which the other end of the redistribution layer is exposed; (F) forming an external terminal on the other end of the redistribution layer which is exposed through the opening of the solder resist layer; and (G) singulating a multi-package into the wafer level package unit including one die therein by cutting along a scribing line formed between the package units.Join the waitlist — get patent alerts
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