US2013001773A1PendingUtilityA1

Semiconductor Device and Method of Forming a Wafer Level Package Structure Using Conductive Via and Exposed Bump

Assignee: STATS CHIPPAC LTDPriority: Feb 25, 2011Filed: Sep 10, 2012Published: Jan 3, 2013
Est. expiryFeb 25, 2031(~4.6 yrs left)· nominal 20-yr term from priority
H10W 74/00H10W 74/142H10W 90/288H10W 90/291H10W 90/752H10W 90/20H10W 72/0198H10W 72/884H10W 90/754H10W 72/874H10W 72/877H10W 72/944H10W 72/90H10W 72/952H10W 72/923H10W 72/9415H10W 72/29H10W 72/9413H10W 72/01935H10W 70/655H10W 70/65H10W 90/00H10W 70/09H10W 90/724H10W 90/22H10W 70/60H10W 70/6528H10W 72/248H10W 72/252H10W 72/012H10W 72/01257H10W 90/792H10W 72/01235H10W 72/01238H10W 72/01225H10W 72/01223H10W 90/734H10W 90/732H10P 72/742H10P 72/7402H10W 74/019H10W 74/014H10W 74/129H10W 74/117H10W 74/114H10W 70/635H10W 42/121H10W 70/614
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Claims

Abstract

A semiconductor device has a carrier. A semiconductor wafer including a semiconductor die is mounted to the carrier with an active surface of the semiconductor die facing away from the carrier. A plurality of bumps is formed over the active surface of the semiconductor die. An opening is formed in a periphery of the semiconductor die. An encapsulant is deposited over the carrier and semiconductor die, in the opening, and around the plurality of bumps such that an exposed portion of the plurality of bumps is devoid of encapsulant. A conductive via is formed through the encapsulant, within the opening, and extends to the carrier. A conductive layer is formed over the encapsulant and electrically connects to the conductive via and the exposed portion of the plurality of bumps. The carrier is removed to expose an end of the conductive via.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device, comprising:
 a semiconductor wafer including a plurality of first semiconductor die comprising an active surface;   a plurality of bumps formed over the active surface of the first semiconductor die;   an encapsulant deposited around and over the first semiconductor die including around the bumps;   a first conductive via formed through the encapsulant; and   a conductive layer formed over the encapsulant between the first conductive via and bumps.   
     
     
         2 . The semiconductor device of  claim 1 , wherein a portion of the bumps is devoid of the encapsulant. 
     
     
         3 . The semiconductor device of  claim 1 , further including a second semiconductor die disposed over the first semiconductor die. 
     
     
         4 . The semiconductor device of  claim 3 , further including a second conductive via formed through the encapsulant between the conductive layer and second semiconductor die. 
     
     
         5 . The semiconductor device of  claim 1 , further including a heat spreader disposed over the first semiconductor die. 
     
     
         6 . The semiconductor device of  claim 1 , further including a plurality of stacked semiconductor devices electrically connected through the first conductive via. 
     
     
         7 . A semiconductor device, comprising:
 a first semiconductor die;   a plurality of bumps formed over a first surface of the first semiconductor die;   an encapsulant deposited around the first semiconductor die and bumps;   a first conductive via formed through the encapsulant; and   a conductive layer formed over the encapsulant between the first conductive via and bumps.   
     
     
         8 . The semiconductor device of  claim 7 , wherein a portion of the bumps is devoid of the encapsulant. 
     
     
         9 . The semiconductor device of  claim 7 , further including a second semiconductor die disposed over the first semiconductor die. 
     
     
         10 . The semiconductor device of  claim 9 , further including a second conductive via formed through the encapsulant between the conductive layer and second semiconductor die. 
     
     
         11 . The semiconductor device of  claim 9 , further including an interconnect structure disposed between the first semiconductor die and second semiconductor die. 
     
     
         12 . The semiconductor device of  claim 7 , further including a heat spreader disposed over the first semiconductor die. 
     
     
         13 . The semiconductor device of  claim 7 , further including a plurality of stacked semiconductor devices electrically connected through the first conductive via. 
     
     
         14 . A semiconductor device, comprising:
 a first semiconductor die;   a first interconnect structure formed over a first surface of the first semiconductor die; and   an encapsulant deposited around and over the first semiconductor die including around a first portion of the first interconnect structure while leaving a second portion of the first interconnect structure devoid of the encapsulant.   
     
     
         15 . The semiconductor device of  claim 14 , further including a conductive via formed through the encapsulant. 
     
     
         16 . The semiconductor device of  claim 15 , further including a conductive layer formed over the encapsulant between the conductive via and first interconnect structure. 
     
     
         17 . The semiconductor device of  claim 15 , further including a plurality of stacked semiconductor devices electrically connected through the conductive via. 
     
     
         18 . The semiconductor device of  claim 14 , wherein the first interconnect structure includes a bump. 
     
     
         19 . The semiconductor device of  claim 14 , further including a second semiconductor die disposed over the first semiconductor die. 
     
     
         20 . The semiconductor device of  claim 19 , further including a second interconnect structure disposed between the first semiconductor die and second semiconductor die. 
     
     
         21 . A semiconductor device, comprising:
 a first semiconductor die;   an interconnect structure formed over a first surface of the first semiconductor die; and   an encapsulant deposited around the first semiconductor die and around a first portion of the interconnect structure while exposing a second portion of the interconnect structure.   
     
     
         22 . The semiconductor device of  claim 21 , further including:
 a conductive via formed through the encapsulant; and   a conductive layer formed over the encapsulant and electrically connected to the conductive via and interconnect structure.   
     
     
         23 . The semiconductor device of  claim 22 , further including a plurality of stacked semiconductor devices electrically connected through the conductive via. 
     
     
         24 . The semiconductor device of  claim 21 , wherein the interconnect structure includes a bump. 
     
     
         25 . The semiconductor device of  claim 21 , further including a second semiconductor die disposed over the first semiconductor die.

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