US2012324305A1PendingUtilityA1
Testing interposer method and apparatus
Individually held — no corporate assignee on recordPriority: Jun 20, 2011Filed: Jun 13, 2012Published: Dec 20, 2012
Est. expiryJun 20, 2031(~4.9 yrs left)· nominal 20-yr term from priority
Inventors:Lee D. Whetsel
H10W 90/726H10W 90/722H10W 72/07254H10W 72/247H10W 70/655B44D 3/126G01R 31/318538G01R 31/26G01R 31/2853H05K 1/115G01R 31/3177G01R 1/0416G01R 31/2889B05C 21/00
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Claims
Abstract
The disclosure describes a novel method and apparatus for improving silicon interposers to include test circuitry for testing stacked die mounted on the interposer. The improvement allows for the stacked die to be selectively tested by an external tester or by the test circuitry included in the interposer.
Claims
exact text as granted — not AI-modified1 . An electrical device including;
at least one die having input leads and output leads coupled to functional circuitry and test circuitry in the die, a test interposer including a first multiplexer, a second multiplexer, a stimulus generator, a response collector and a TAP, and; connections formed between; (1) the outputs of the stimulus generator and first inputs to the first multiplexer, (2) the input leads of the test interposer and second inputs to the first multiplexer, (3) the outputs of the first multiplexer and output leads of the test interposer, (4) the outputs of the TAP and first inputs of the second multiplexer, (5) the input leads of the test interposer and second inputs to the second multiplexer, (6) the outputs of the second multiplexer and output leads of the test interposer, (7) the input leads of the test interposer and inputs to the response collector, (8) the TAP and the stimulus generator and response collector, (9) the TAP and TAP input leads and a TAP output lead of the test interposer, (10) some of the output leads of the test interposer and input leads of the die and (11) some of the input leads of the test interposer and output leads of the die.
2 . An electrical device including;
at least one die having input leads and output leads coupled to functional circuitry and test circuitry in the die, a test interposer including a first multiplexer, a second multiplexer, a stimulus generator, a control generator, a response collector and a TAP; and, connections formed between; (1) the outputs of the stimulus generator and first inputs to the first multiplexer, (2) the input leads of the test interposer and second inputs to the first multiplexer, (3) the outputs of the first multiplexer and output leads of the test interposer, (4) the outputs of the control generator and first inputs of the second multiplexer, (5) the input leads of the test interposer and second inputs to the second multiplexer, (6) the outputs of the second multiplexer and output leads of the test interposer, (7) the input leads of the test interposer and inputs to the response collector, (8) the TAP and the stimulus generator, control generator and response collector, (9) the TAP and TAP input leads and a TAP output lead of the test interposer, (10) some of the output leads of the test interposer and input leads of the die and (11) some of the input leads of the test interposer and output leads of the die.
3 . An electrical device including;
at least one die having input leads and output leads coupled to inputs and outputs of a test compression circuit in the die, a test interposer including a first multiplexer, a second multiplexer, a stimulus generator, a response collector and a TAP, and; connections formed between; (1) the outputs of the stimulus generator and first inputs to the first multiplexer, (2) the input leads of the test interposer and second inputs to the first multiplexer, (3) the outputs of the first multiplexer and output leads of the test interposer, (4) the outputs of the TAP and first inputs of the second multiplexer, (5) the input leads of the test interposer and second inputs to the second multiplexer, (6) the outputs of the second multiplexer and output leads of the test interposer, (7) the input leads of the test interposer and inputs to the response collector, (8) the TAP, the stimulus generator and response collector, (9) the TAP and TAP input leads and a TAP output lead of the test interposer, (10) some of the output leads of the test interposer and input leads to the test compression circuit of the die and (11) some of the input leads of the test interposer and output leads of the test compression circuit of the die.
4 . An electrical device including;
at least one die having input leads and output leads coupled to inputs and outputs of a test compression circuit in the die, a test interposer including a stimulus generator having outputs, a response collector having inputs and a TAP having outputs and a control bus, the outputs of the stimulus generator being coupled to output leads of the test interposer, the inputs of the response collector being coupled to input leads of the test interposer, the outputs of the TAP being coupled to output leads of the test interposer, and; connections formed between; (1) the TAP control bus and the stimulus generator and response collector, (2) the TAP and TAP input leads and a TAP output lead of the test interposer, (3) the output leads of the test interposer and input leads of the die and (4) the output leads of the die and the input leads of the test interposer.
5 . An electrical device including;
at least one die having input leads and output leads coupled to inputs and outputs of a test compression circuit in the die, a test interposer including first input leads, second input leads, first output leads, second output leads, a response collector and a TAP, the first input leads being coupled to the first output leads, the second input leads being coupled to inputs of the response collector, the second output leads being coupled to outputs from the TAP, a control bus formed between the TAP and the response collector, and; connections formed between; (1) the TAP and TAP input leads and a TAP output lead of the test interposer, (2) the first and second output leads of the test interposer and input leads of the die and (3) the output leads of the die and the second input leads of the test interposer.
6 . An electrical device including;
at least one die having input leads and output leads coupled to inputs and outputs of a test compression circuit in the die, a test interposer including a first multiplexer, a second multiplexer, a stimulus generator, a control generator, a response collector and a TAP, and; connections formed between; (1) the outputs of the stimulus generator and first inputs to the first multiplexer, (2) the input leads of the test interposer and second inputs to the first multiplexer, (3) the outputs of the first multiplexer and output leads of the test interposer, (4) the outputs of the control generator and first inputs of the second multiplexer, (5) the input leads of the test interposer and second inputs to the second multiplexer, (6) the outputs of the second multiplexer and output leads of the test interposer, (7) the input leads of the test interposer and inputs to the response collector, (8) the TAP and the stimulus generator, control generator and response collector, (9) the TAP and TAP input leads and a TAP output lead of the test interposer, (10) some of the output leads of the test interposer and input leads of the die and (11) some of the input leads of the test interposer and output leads of the die.
7 . An electrical device including;
at least one die having input leads and output leads coupled to inputs and outputs of a test compression circuit in the die, a test interposer including a stimulus generator having outputs, a control generator having outputs, a response collector having inputs and a TAP having outputs and a control bus, the outputs of the stimulus generator being coupled to output leads of the test interposer, the outputs of the control generator being coupled to outputs leads of the test interposer, the inputs of the response collector being coupled to input leads of the test interposer, and; connections formed between; (1) the TAP control bus and the stimulus generator, control generator and response collector, (2) the TAP and TAP input leads and a TAP output lead of the test interposer, (3) the output leads of the test interposer and input leads of the die and (4) the output leads of the die and the input leads of the test interposer.
8 . An electrical device including;
at least one die having input leads and output leads coupled to inputs and outputs of a testable memory in the die, a test interposer including a first multiplexer, a second multiplexer, a stimulus generator, a control generator, a response collector and a TAP, and; connections formed between: (1) the outputs of the stimulus generator and first inputs to the first multiplexer, (2) the input leads of the test interposer and second inputs to the first multiplexer, (3) the outputs of the first multiplexer and output leads of the test interposer, (4) the outputs of the control generator and first inputs of the second multiplexer, (5) the input leads of the test interposer and second inputs to the second multiplexer, (6) the outputs of the second multiplexer and output leads of the test interposer, (7) the input leads of the test interposer and inputs to the response collector, (8) the TAP and the stimulus generator, control generator and response collector, (9) the TAP and TAP input leads and a TAP output lead of the test interposer, (10) some of the output leads of the test interposer and input leads of the die and (11) some of the input leads of the test interposer and output leads of the die.
9 . An electrical device including;
at least one die having input leads and output leads coupled to inputs and outputs of a testable memory in the die, a test interposer including a stimulus generator having outputs, a control generator having outputs, a response collector having inputs and a TAP having outputs and a control bus, the outputs of the stimulus generator being coupled to output leads of the test interposer, the outputs of the control generator being coupled to outputs leads of the test interposer, the inputs of the response collector being coupled to input leads of the test interposer, and; connections formed between; (1) the TAP control bus and the stimulus generator, control generator and response collector, (2) the TAP and TAP input leads and a TAP output lead of the test interposer, (3) the output leads of the test interposer and input leads of the die and (4) the output leads of the die and the input leads of the test interposer.
10 . An electrical device including;
at least one die having input leads and output leads coupled to an input and outputs of a testable ADC in the die, a test interposer including a switch, a multiplexer, a stimulus generator, a control generator, a response collector and a TAP, and; connections formed between: (1) the output of the stimulus generator and a first input to the switch, (2) an input lead of the test interposer and a second input to the switch, (3) the output of the switch and an output lead of the test interposer, (4) the outputs of the control generator and first inputs of the second multiplexer, (5) the input leads of the test interposer and second inputs to the second multiplexer, (6) the outputs of the second multiplexer and output leads of the test interposer, (7) the input leads of the test interposer and inputs to the response collector, (8) the TAP and the stimulus generator, control generator and response collector, (9) the TAP and TAP input leads and a TAP output lead of the test interposer, (10) some of the output leads of the test interposer and input leads of the die and (11) some of the input leads of the test interposer and output leads of the die.
11 . An electrical device including;
at least one die having an input lead and output leads coupled to an input and outputs of a testable ADC in the die, a test interposer including a stimulus generator having an output, a control generator having outputs, a response collector having inputs and a TAP having outputs and a control bus, the output of the stimulus generator being coupled to an output lead of the test interposer, the outputs of the control generator being coupled to outputs leads of the test interposer, the inputs of the response collector being coupled to input leads of the test interposer, and; connections formed between; (1) the TAP control bus and the stimulus generator, control generator and response collector, (2) the TAP and TAP input leads and a TAP output lead of the test interposer, (3) at least one output lead of the test interposer and at least one input lead of the die and (4) the output leads of the die and the input leads of the test interposer.
12 . An electrical device including;
at least one die having input leads and output leads coupled to inputs and an output of a testable DAC in the die, a test interposer including a first multiplexer, a second multiplexer, a stimulus generator, a control generator, a response collector and a TAP, and; connections formed between: (1) the outputs of the stimulus generator and first inputs to the first multiplexer, (2) the input leads of the test interposer and second inputs to the first multiplexer, (3) the outputs of the first multiplexer and output leads of the test interposer, (4) the outputs of the control generator and first inputs of the second multiplexer, (5) the input leads of the test interposer and second inputs to the second multiplexer, (6) the outputs of the second multiplexer and output leads of the test interposer, (7) an input lead of the test interposer and an input to the response collector, (8) the TAP and the stimulus generator, control generator and response collector, (9) the TAP and TAP input leads and a TAP output lead of the test interposer, (10) some of the output leads of the test interposer and input leads of the die and (11) at least one input lead of the test interposer and at least one output lead of the die.
13 . An electrical device including;
at least one die having input leads and an output lead coupled to inputs and an output of a testable DAC in the die, a test interposer including a stimulus generator having outputs, a control generator having outputs, a response collector having an input and a TAP having outputs and a control bus, the outputs of the stimulus generator being coupled to output leads of the test interposer, the outputs of the control generator being coupled to outputs leads of the test interposer, the input of the response collector being coupled to an input lead of the test interposer, and; connections formed between; (1) the TAP control bus and the stimulus generator, control generator and response collector, (2) the TAP and TAP input leads and a TAP output lead of the test interposer, (3) the output leads of the test interposer and input leads of the die and (4) at least one input lead of the test interposer and at least one output lead of the die.
14 . An electrical device including;
a first die including a test circuit having a stimulus bus input, a control bus input and a response bus output, a second die stacked on top of the first die, said second die including a test circuit having a stimulus bus input, a control bus input and a response bus output, and; a test interposer onto which the first die is mounted, said test interposer including; (1) a first stimulus bus output coupled to the stimulus bus input of the test circuit of the first die, (2) a second stimulus bus output coupled to the stimulus bus input of the test circuit of the second die, (3) a first control bus output coupled to the control bus input of the test circuit of the first die, (4) a second control bus output coupled to the control bus input of the test circuit of the second die, (5) a first response bus input coupled to the response but output of the test circuit of the first die and (6) a second response bus input coupled to the response bus output of the test circuit of the second die.
15 . An electrical device including;
a first die including a test circuit having a common stimulus bus input, a common control bus input and a common response bus output, a second die stacked on top of the first die, said second die including a test circuit having a common stimulus bus input, a common control bus input and a common response bus output, and; a test interposer onto which the first die is mounted, said test interposer including; (1) a common stimulus bus output coupled to the common stimulus bus inputs of the test circuits of the first and second die, (2) a common control bus output coupled to the common control bus inputs of the test circuits of the first and second die and (3) a common response bus input selectively coupled to the common response bus outputs of the test circuits of the first and second die.
16 . An electrical device including;
an upper die including functional and test circuitry having input leads and output leads coupled respectively to input terminals and output terminals on the bottom surface of the upper die, a lower die including functional and test circuitry having input leads and output leads, a test interposer having first input leads coupled to input terminals on the bottom surface of the lower die, second input leads coupled to input terminals on the top surface of the lower die, third input leads coupled to output leads of the functional and test circuitry, first output leads coupled to output terminals on the bottom surface of the lower die, second output leads coupled to output terminals on the top surface of the lower die and third output leads coupled to the input leads of the functional and test circuitry, connections formed between the top surface input terminals of the lower die and the bottom surface output terminals of the upper die, and; connections formed between the top surface output terminals of the lower die and the bottom surface input terminals of the upper die.Join the waitlist — get patent alerts
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