US2012299175A1PendingUtilityA1

Systems and methods to cool semiconductor

Assignee: TRAN BAOPriority: Feb 23, 2005Filed: Nov 19, 2011Published: Nov 29, 2012
Est. expiryFeb 23, 2025(expired)· nominal 20-yr term from priority
Inventors:Bao Tran
H10W 74/00H10W 72/5522H10W 72/59H10W 72/952H10W 72/075H10W 72/552H10W 70/465G11C 2213/17G11C 2213/79G11C 13/0019Y10S977/724G11C 23/00Y10S977/734B82Y 10/00G11C 13/025G11C 13/0014B82Y 30/00G11C 13/04B82Y 20/00G11C 13/02H10F 39/80H10K 50/11
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Claims

Abstract

Systems and methods are disclosed for fabricating a semiconductor device by forming heat conducting nanowires on a first side of a wafer; and depositing semiconductor structures on a second side of the wafer.

Claims

exact text as granted — not AI-modified
1 . A method for fabricating a semiconductor device, comprising:
 forming heat conducting nanowires on a first side of a wafer;   depositing semiconductor structures on a second side of the wafer.   
     
     
         2 . The method of  claim 1 , comprising forming 3D heat conducting nanowires on the first side of the wafer. 
     
     
         3 . The method of  claim 1 , comprising
 depositing conductive filler between the nanowires; and   planarizing the nanowires and the conductive filler   
     
     
         4 . The method of  claim 1 , wherein planarizing comprises performing chemical-mechanical planarization. 
     
     
         5 . The method of  claim 1 , comprising
 patterning and etching cavities on the first side;   depositing an interface material on the cavities;   forming nanotubes on the cavities; and   depositing a conductive filler between the nanowires.   
     
     
         6 . A method for fabricating a heat remover, comprising:
 forming heat conducting nanowires on a first side of a substrate;   providing a heat conducting interface layer on a second side of the substrate; and   mounting the bottom of the substrate to an electronic device.   
     
     
         6 . The method of  claim 6 , comprising forming one or more cooling fins above heat conducting nanowires. 
     
     
         7 . The method of  claim 6 , comprising attaching an external cooler to the electronic device. 
     
     
         8 . The method of  claim 7 , wherein the external cooler comprises one of: a heat spreader, a heat pipe, a heat sink. 
     
     
         9 . The method of  claim 6 , comprising removing the nanowires to form channels to circulate a heat conducting fluid therein. 
     
     
         10 . A semiconductor device, comprising:
 a die having heat conducting nanowires on a first side of the die and semiconductor structures on a second side of the die; and   an external cooler to remove heat from the nanowires.   
     
     
         11 . The semiconductor device of  claim 10 , wherein the nanowires comprise one of: rod shape, cone shape, spring shape, three-dimensional shape. 
     
     
         12 . The semiconductor device of  claim 10 , comprising an encapsulation around the die having microchannels therein. 
     
     
         13 . The semiconductor device of  claim 12 , comprising: a thermal transport fluid disposed in the microchannels. 
     
     
         14 . The semiconductor device of  claim 12 , comprising a pump that circulates the thermal transport fluid through the microchannels. 
     
     
         15 . The semiconductor device of  claim 12 , comprising a heat exchanger. 
     
     
         16 . The semiconductor device of  claim 10 , wherein the nanotubes are oriented generally perpendicular to the die. 
     
     
         17 . The semiconductor device of  claim 10 , comprising a heat remover between the die and the external cooler, the heat remover having heat conducting nanowires on a first surface and a heat conducting interface layer on a second surface. 
     
     
         18 . The semiconductor device of  claim 17 , wherein the heat remover is etched to provide fins. 
     
     
         19 . The semiconductor device of  claim 10 , wherein the die comprises:
 patterned cavities etched on the first side; and   an interface material deposited on the cavities;   
     
     
         20 . The semiconductor device of  claim 10 , wherein the die comprises a conductive filler deposited between the nanowires.

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