Embedded chip package

Abstract

An electronic assembly is disclosed. One embodiment includes at least one semiconductor chip and a package structure embedding the semiconductor chip. The package structure includes at least one conducting line extending into an area of the package structure outside of the outline of the chip.

1 . An electronic assembly, comprising:
 at least one semiconductor chip defining a chip outline;   a package structure embedding the semiconductor chip, the package structure defining a package periphery; and   the package structure comprising at least one conducting line extending into an area of the package structure that is outside of the outline of the chip and inside the package periphery.   
     
     
         2 . The electronic assembly of  claim 1 , further comprising a substrate wherein the substrate is a printed circuit board. 
     
     
         3 . The electronic assembly of  claim 1 , wherein the package structure comprises a carrier on which the chip is mounted, wherein the carrier extends laterally beyond the outline of the chip. 
     
     
         4 . The electronic assembly of  claim 3 , wherein the carrier is a laminate substrate. 
     
     
         5 . The electronic assembly of  claim 3 , wherein the carrier is a leadframe. 
     
     
         6 . The electronic assembly of  claim 4 , wherein the chip is flip-chip mounted on the carrier. 
     
     
         7 . The electronic assembly of  claim 5 , wherein the chip is wire-bonded to the carrier. 
     
     
         8 . The electronic assembly of  claim 1 , wherein a backside of the package structure is a multilayer. 
     
     
         9 . The electronic assembly of  claim 1 , wherein the substrate comprises at least one core layer and at least one polymer build-up layer above the epoxy core layer. 
     
     
         10 . The electronic assembly of  claim 8 , wherein the package structure is embedded in the at least one polymer build-up layer. 
     
     
         11 . The electronic assembly of  claim 8 , wherein the package structure is embedded in the at least one core layer. 
     
     
         12 . The electronic assembly of  claim 9 , wherein the core layer is made of one or more materials of the group comprising epoxy, fluoropolymer, polytetrafluoroethylene, aramid fibers, and carbon fibers. 
     
     
         13 . The electronic assembly of  claim 1 , wherein the substrate comprises a copper-carbon fiber compound material. 
     
     
         14 . The electronic assembly of  claim 1 , wherein the substrate is a mold compound. 
     
     
         15 . The electronic assembly of  claim 1 , wherein the substrate is a printed circuit board. 
     
     
         16 . The electronic assembly of  claim 1 , wherein the substrate is a ceramic substrate. 
     
     
         17 . The electronic assembly of  claim 16 , wherein the package structure is mounted in a cavity of the ceramic substrate. 
     
     
         18 . A method comprising:
 providing a package structure embedding at least one semiconductor chip and comprising at least one conducting line extending into an area of the package structure inside a package periphery and outside of the outline of the chip.   
     
     
         19 . The method of  claim 18 , further comprising:
 including the package structure on a substrate and   providing a conductive wiring of the substrate.   
     
     
         20 . The method of  claim 19 , further comprising:
 generating vias in the substrate to connect the conductive wiring to the at least one conducting line of the package structure.   
     
     
         21 . The method of  claim 20 , wherein embedding the package structure in the substrate comprises:
 providing a core layer of the substrate;   placing the package structure above the core layer; and   embedding the package structure in at least one polymer build-up layer generated above the epoxy core layer.   
     
     
         22 . The method of  claim 21 , further comprising:
 generating vias extending through the at least one polymer build-up layer.   
     
     
         23 . The method of  claim 19 , wherein including the package structure on the substrate comprises:
 providing a support member;   placing the package structure onto the support member; and   embedding the package structure into a dielectric compound to generate a molded substrate.   
     
     
         24 . The method of  claim 23 , comprising removing the support member from the molded substrate. 
     
     
         25 . The method of  claim 23 , comprising using a liquid mold material for embedding. 
     
     
         26 . The method of  claim 25 , further comprising:
 curing the liquid mold material using a compression mold tool.   
     
     
         27 . The method of  claim 23 , further comprising:
 generating vias in the molded substrate to electrically connect to the at least one conducting line.   
     
     
         28 . The method of  claim 19 , wherein including the package structure on the substrate comprises:
 encapsulation of the package structure into one or more dielectric layers of a printed circuit board.   
     
     
         29 . The method of  claim 28 , further comprising:
 generating vias in at least one dielectric layer to electrically connect to the at least one conducting line.   
     
     
         30 . The method of  claim 19 , wherein including the package structure on the substrate comprises:
 forming a cavity in the substrate; and   disposing the package structure into the cavity.   
     
     
         31 . An assembly comprising:
 a fan-out type package structure comprising a chip, wherein the fan-out type package structure comprises a mold compound embedding the chip, a conductive redistribution layer extending laterally beyond the chip outline and being confined to the package outline and a dielectric layer arranged above the conductive redistribution layer and extending laterally beyond the chip outline and being laterally confined to the package outline.   
     
     
         32 . The assembly of  claim 31  further comprising a substrate configured to embed the fan-out type package structure, wherein the substrate comprises a conductive wiring electrically connected to the conductive redistribution layer of the fan-out package structure via openings in the dielectric layer, and wherein the substrate is a printed circuit board. 
     
     
         33 . The assembly of  claim 31 , wherein the fan-out type package structure comprises a mold compound embedding the chip and a conductive redistribution layer extending laterally beyond the chip outline. 
     
     
         34 . The assembly of  claim 32 , wherein the substrate comprises a conductive wiring electrically connected to the conductive redistribution layer of the fan-out type package structure. 
     
     
         35 . The electronic assembly of  claim 32 , wherein the substrate is a printed circuit board. 
     
     
         36 . The electronic assembly of  claim 32 , wherein the substrate comprises at least one core layer and at least one polymer build-up layer above the epoxy core layer. 
     
     
         37 . A method comprising:
 providing a fan-out type package structure comprising a chip; and   embedding the fan-out type package structure in a substrate.   
     
     
         38 . The method of  claim 37 , further comprising:
 electrically connecting pads on the fan-out type package structure to a conductive wiring of the substrate.