Deep standby method and device for embedded system

Abstract

A deep standby method and device for and embedded system is disclosed, wherein the method mainly includes: a selecting step for selecting an available data swap block from the data swap area of a non-volatile memory as a deep standby block; a writing step for writing the current system data and state of the CPU into the deep standby block, and writing a deep standby flag into the deep standby block; and a shutting down step for making the system off to fall into a deep standby.

1 . A deep standby method for an embedded system, comprising:
 a selecting step for selecting an available data swap block from a data swap area of a non-volatile memory as a deep standby block;   a writing step for writing current system data and CPU state into the deep standby block, and writing a deep standby flag into the deep standby block; and   a shutting down step for powering off the system to fall into deep standby.   
     
     
         2 . The method according to  claim 1 , further comprising:
 a recovering step for reading data in a valid deep standby block to recover the system data and CPU state when the system is powered on to start again and a deep standby flag is found after memory mapping initialization, and writing a cancel flag into the deep standby block.   
     
     
         3 . The method according to  claim 1 , further comprising:
 a starting step for switching the system into deep standby, when the user holds down a shutdown key during the system running or there is no operation in a predetermined period and after it is ensured that system hardware operation has ended.   
     
     
         4 . The method according to  claim 2 , further comprising:
 a start judging step for judging whether there is the valid deep standby flag when the system is powered on to start, if there is a valid deep standby flag, switching into the recovering step; else, starting normally.   
     
     
         5 . The method according to  claim 2 , further comprising:
 a checking step for checking whether the location of the found deep standby block is consistent with that of the deep standby block that is recorded by a global variable before writing data; if not consistent, the deep standby flag is invalid and the corresponding deep standby block is illegal, writing a cancel flag into a spare area of the last page of the block and restarting the system; and/or   checking whether the checksum calculated during saving data is consistent with that calculated after the system is recovered, if not consistent, the data recovery is invalid, writing a cancel flag into a spare area of the last page of the block and restarting the system.   
     
     
         6 . The method according to  claim 2 , further comprising:
 an initializing step for performing related hardware initialization, after the system data is recovered successful and the location before the system saving is returned, so as to return the system to the state before the deep standby mode.   
     
     
         7 . The method according to  claim 1 , wherein in the selecting step, a current data swap block in which the number of remaining pages is not less than cnt+1 is selected as the deep standby block, wherein cnt is the number of the pages of the memory-resident area data. 
     
     
         8 . The method according to  claim 1 , wherein in the selecting step, two deep standby blocks are selected for storing the current system data and CPU state, wherein one deep standby block is a main deep standby block, the other deep standby block is a backup deep standby block, and the backup deep standby block is a valid data swap block next to the main deep standby block. 
     
     
         9 . The method according to  claim 1 , wherein in the writing step, writing the value of a counter serial number into the deep standby block, wherein the value of the counter serial number is automatically increased by one and saved each time the selected deep standby block is used. 
     
     
         10 . The method according to  claim 9 , wherein in the recovering step, searching a data swap block having a maximum value of the counter serial number and determining the data swap block as a valid deep standby block after judging the data swap block has a deep block flag and no cancel flag. 
     
     
         11 . The method according to  claim 10 , wherein a binary searching algorithm is utilized to search the maximum value of the counter serial number. 
     
     
         12 . The method according to  claim 9 , wherein the deep standby flag, the value of the counter serial number and the cancel flag are respectively written into the spare areas of the last third page, the last second page and the last page of the deep standby block. 
     
     
         13 . The method according to  claim 1 , wherein in the writing step, the deep standby flag is written into the deep standby block after the current system data and CPU state are written into the last page of the deep standby block. 
     
     
         14 . The method according to  claim 1 , wherein when writing the current system data and CPU state, the last page of the deep standby block is reserved for writing a cancel flag. 
     
     
         15 . A device for switching an embedded system into deep standby, comprising:
 a selecting unit configured to select an available data swap block from a data swap block of a non-volatile memory as a deep standby block;   a writing unit configured to write current system data and CPU state into the deep standby block, and write a deep standby flag into the deep standby block; and   a shutting down unit configured to power off the system to fall into deep standby.   
     
     
         16 . The device according to  claim 15 , further comprising:
 a recovering unit configured to read data in a valid deep standby block to recover the system data and CPU data when the system is powered on to start again and a deep standby flag is found after memory mapping initialization, and write a cancel flag into the deep standby block.   
     
     
         17 . The device according to  claim 15 , further comprising:
 a starting unit configured to switch the system into deep standby when the user holds down a shutdown key during the system running or there is no operation in a predetermined period and after it is ensured that system hardware operation has ended.   
     
     
         18 . The device according to  claim 16 , further comprising:
 a start judging unit configured to judge whether there is a valid deep standby flag when the system is powered on to start, wherein if there is a valid deep standby flag, the recovering unit runs; else, the system starts normally.   
     
     
         19 . The device according to  claim 16 , further comprising:
 a checking unit configured to check whether the location of the found deep standby block is consistent with that of the deep standby block that is recorded by a global variable before writing data, if not consistent, the deep standby flag is invalid and the corresponding deep standby block is illegal, and the system restarts after writing a cancel flag into the spare area of the last page of the block; and/or   configured to check whether the checksum calculated during saving data is consistent with that calculated after the system is recovered, if no consistent, the data recovery is invalid, and the system restarts after a cancel flag is written into the spare area of the last page of the block.   
     
     
         20 . The device according to  claim 16 , further comprising:
 an initializing unit configured to perform related hardware initialization after the system data is recovered successfully and the location before the system saving is returned, so as to return the system to the state before the deep standby mode.   
     
     
         21 . An embedded system, comprising a device for switching an
 embedded system into deep standby, wherein the device comprising:   a selecting unit configured to select an available data swap block from a data swap block  5  of a non-volatile memory as a deep standby block;   a writing unit configured to write current system data and CPU state into the deep standby block, and write a deep standby flag into the deep standby block; and   a shutting down unit configured to power off the system to fall into deep standby.