US2012280405A1PendingUtilityA1

Semiconductor packages and methods of manufacuring the same

Assignee: HWANG JIHWANPriority: May 2, 2011Filed: May 2, 2012Published: Nov 8, 2012
Est. expiryMay 2, 2031(~4.8 yrs left)· nominal 20-yr term from priority
H10P 72/7416H10P 72/74H10W 90/732H10W 90/724H10W 90/722H10W 90/297H10W 90/291H10W 90/20H10W 74/141H10W 74/15H10W 74/012H10W 74/01H10W 72/0198H10W 90/00H10W 72/07207H10W 72/248H10W 70/60H10W 74/00
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Claims

Abstract

Provided are semiconductor devices and methods of manufacturing the same. The semiconductor package includes a substrate, a first semiconductor chip mounted on the circuit substrate and having a first width, a second semiconductor chip overlying the first semiconductor chip and having a second width greater than the first width, and a first under filler disposed between the first and second semiconductor chips, covering a side surface of the first semiconductor chip and having an inclined side surface.

Claims

exact text as granted — not AI-modified
1 . A semiconductor package comprising:
 a substrate;   a first semiconductor chip mounted on the substrate, and having a first width;   a second semiconductor chip overlying the first semiconductor chip, and having a second width greater than the first width; and   a first under filler disposed between the first and second semiconductor chips, covering a side surface of the first semiconductor chip, and having an inclined side surface.   
     
     
         2 . The semiconductor package of  claim 1 , further comprising:
 a second under filler disposed between the substrate and the first semiconductor chip, and having an inclined side surface.   
     
     
         3 . The semiconductor package of  claim 2 , wherein the second under filler at least partially covers the first under filler covering the side surface of the first semiconductor chip. 
     
     
         4 . The semiconductor package of  claim 2 , wherein an inclination of the side surface of the first under filler is opposite to an inclination of the side surface of the second under filler. 
     
     
         5 . The semiconductor package of  claim 1 , further comprising:
 at least one first connection terminal electrically interconnecting the circuit substrate and the first semiconductor chip; and   at least one second connection terminal interconnecting the first semiconductor chip and the second semiconductor chip.   
     
     
         6 - 16 . (canceled) 
     
     
         17 . A semiconductor package comprising:
 a substrate;   a first semiconductor chip mounted on the substrate, and having a first width;   a second semiconductor chip overlying the first semiconductor chip, and having a second width greater than the first width; and   a first under filler disposed between the first and second semiconductor chips, covering a side surface of the first semiconductor chip, and the first under filler having a width at a top portion thereof greater than a width at a bottom portion thereof.   
     
     
         18 . The semiconductor package of  claim 17 , further comprising:
 a second under filler disposed between the substrate and the first semiconductor chip, the second under filler having a width at a bottom portion thereof greater than a width at a top portion thereof.   
     
     
         19 . The semiconductor package of  claim 17 , wherein a side surface of the first under filler is inclined at a steady slope, concave or convex shaped, tapered or stair-stepped from the top toward the base thereof.

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