Semiconductor device and manufacturing method of the same

Abstract

A method of making a semiconductor device having an ESD protection element which can achieve compatibility between high drain-to-backgate withstand voltage and ESD protection of DMOSFET gates.

1 . A semiconductor device comprising:
 a transistor region; and   a protection element region,   wherein the transistor region includes,   a drain region which includes a first conductivity type semiconductor layer;
 a first region formed over the drain region; 
 a second region which includes a second conductivity type semiconductor region formed in the first region; 
 a gate insulating layer formed over the surfaces of the first region and second region; 
 a gate electrode formed over the gate insulating layer to straddle a part of the surface of the second region and a part of the surface of the first region; 
 a source region which includes a first conductivity type semiconductor region; and 
 a channel region formed over a part of the surface of the second region. 
   
     
     
         2 . The semiconductor device of  claim 1  comprising, in the transistor region and protection element region, second conductivity type regions which are arranged in the direction approximately parallel to the surface of the drain region. 
     
     
         3 . The semiconductor device of  claim 1 , wherein the protection element region is to protect an electrostatic discharge. 
     
     
         4 . The semiconductor device of  claim 1 , wherein the first region is a drift region. 
     
     
         5 . The semiconductor device of  claim 1 , wherein the first region includes a first conductivity type semiconductor region. 
     
     
         6 . The semiconductor device of  claim 1 , wherein the second region is a body region. 
     
     
         7 . The semiconductor device of  claim 1 , wherein the source region is formed over a part of the surface of the second region at the end portion of the gate electrode. 
     
     
         8 . The semiconductor device of  claim 1 , wherein the source region is covered by the end portion of the gate electrode in the second region. 
     
     
         9 . The semiconductor device of  claim 1 , further comprising a potential extraction region to extract the potential of the second region which includes a second conductivity type impurity diffusion layer formed over the surface of the second region, 
     
     
         10 . The semiconductor device of  claim 1 , wherein the protection element region includes, the second region having the same configuration as those in the transistor region; 
     
     
         11 . The semiconductor device of  claim 10 , wherein the gate insulating layer formed over the surface of the second region and the gate electrode formed over the gate insulating layer over a part of the surface of the second region; 
     
     
         12 . The semiconductor device of  claim 11 , further comprising a source region and a drain region, the source region including a first conductivity type semiconductor region formed over a part of the surface of the second region at the end portion of the gate electrode, and the drain region including a first conductivity type semiconductor region; and 
     
     
         13 . The semiconductor device of  claim 12 , further comprising a potential extraction region to extract the potential of the second region, which includes a second conductivity type semiconductor region formed over a part of the surface of the second region. 
     
     
         14 . The semiconductor device of  claim 1 , wherein a gate length in the protection element region is equal to or less than twice a channel length in the transistor region. 
     
     
         15 . The semiconductor device of  claim 1 , wherein the first region is a epitaxial region. 
     
     
         16 . The semiconductor device of  claim 1 , wherein the second conductivity type region is a ion-implanted region. 
     
     
         17 . The semiconductor device of  claim 1 , wherein the first conductivity type region is a ion-implanted region.