Semiconductor device and manufacturing method thereof

Abstract

As a substrate for a semiconductor device, a metal substrate is used, and the metal substrate is composed of a metal base body made of a first metal and a connecting metal layer made of a second metal for covering the metal base body. The substrate has a structure wherein a diffusion preventing layer for preventing diffusion of the first metal is provided on the connecting metal layer.

1 . A vertical-type semiconductor device, comprising:
 a semiconductor layer formed with at least a portion of an element, wherein said at least a portion of said element is formed in a silicon semiconductor layer having a plane orientation selected from the group consisting of a {110} plane orientation, a {511} plane, a {331} plane, a {221} plane, a {321} plane, a {531} plane, a {231} plane, a {351} plane, a {320} plane, a {230} plane, and plane orientations equivalent thereto, wherein said semiconductor layer comprises a plurality of semiconductor layers having different conductivity types, said plurality of semiconductor layers comprising all of the monocrystalline semiconductor layers of said vertical type semiconductor device, wherein said plurality of semiconductor layers are each made of a silicon crystal having a same plane orientation selected from the group consisting of a {110} plane orientation, plane orientations equivalent to said plane orientation, a {511} plane, a {331} plane, a {221} plane, a {321} plane, a {531} plane, a {231} plane, a {351} plane, a {320} plane, a {230} plane, and plane orientations equivalent thereto.   
     
     
         2 . A vertical-type semiconductor device according to  claim 1 , wherein said semiconductor layer formed with said at least a portion of said element comprises a plurality of semiconductor layer portions and an impurity profile of said semiconductor layer portions contacting each other represents substantially stepwise joining. 
     
     
         3 . A vertical-type semiconductor device according to  claim 1 , wherein said element is an element selected from the group consisting of a bipolar transistor, a vertical-type MOSFET, an IGBT, a thyristor, and a GTO. 
     
     
         4 . A vertical-type semiconductor device according to  claim 1 , wherein said semiconductor layer is the semiconductor layer provided on the substrate according to  claim 1 . 
     
     
         5 . A vertical-type semiconductor device according to  claim 1 , wherein said plurality of semiconductor layers comprises a lower semiconductor layer contacting said substrate and having a thickness of 20 μm or less. 
     
     
         6 . A vertical-type semiconductor device according to  claim 1 , wherein a plurality of elements having different polarities are separated from each other by an element separating region and at least portions of said plurality of elements are formed in the same semiconductor layer. 
     
     
         7 . A manufacturing method of a vertical-type semiconductor device having a plurality of semiconductor layers with different conductivity types on a metal substrate, said manufacturing method comprising:
 a step of forming porous silicon on a silicon substrate, a step of epitaxially growing epitaxial semiconductor layers having a plurality of conductivity types on said porous silicon, wherein all of said epitaxial semiconductor layers of said vertical-type semiconductor device are each made of a silicon crystal having a same plane orientation selected from the group consisting of a {110} plane orientation, plane orientations equivalent to said plane orientation, a {511} plane, a {331} plane, a {221} plane, a {321} plane, a {531} plane, a {231} plane, a {351} plane, a {320} plane, a {230} plane, and plane orientations equivalent thereto,   a step of bonding together said epitaxial silicon layers and a metal substrate, and   a step of cutting off, from a substrate in which said metal substrate and a semiconductor substrate having said epitaxial silicon layers are bonded together, said semiconductor substrate at an interface between said epitaxial silicon layers and said porous silicon layer.   
     
     
         8 . A manufacturing method of a vertical-type semiconductor device having a plurality of semiconductor layers with different conductivity types on a metal substrate, said manufacturing method comprising:
 a step of forming porous silicon on a silicon substrate, a step of epitaxially growing epitaxial semiconductor layers alternately in divided regions, all of said epitaxial semiconductor layers of said vertical-type semiconductor device having a plurality of conductivity types and adjacent to each other in a horizontal direction with respect to a substrate surface, wherein said semiconductor layers are each made of a silicon crystal having a same plane orientation selected from the group consisting of a {110} plane orientation, plane orientations equivalent to said plane orientation, a {511} plane, a {331} plane, a {221} plane, a {321} plane, a {531} plane, a {231} plane, a {351} plane, a {320} plane, a {230} plane, and plane orientations equivalent thereto,   a step of bonding together said epitaxial silicon layers and a metal substrate, a step of cutting off, from a substrate in which said metal substrate and a semiconductor substrate having said epitaxial silicon layers are bonded together, said semiconductor substrate at an interface between said epitaxial silicon layers and said porous silicon layer, and   a step of forming an electrically-insulating element separating layer at a boundary of said regions.   
     
     
         9 . A manufacturing method of a semiconductor device according to  claim 7 , wherein a temperature of said epitaxial growth is 600° C. or less.