Semiconductor device including a crystal semiconductor layer, its fabrication and its operation
Abstract
In one embodiment, a method of fabricating a semiconductor device having a crystalline semiconductor layer includes preparing a semiconductor substrate and forming a preliminary active pattern on the semiconductor substrate. The preliminary active pattern includes a barrier pattern and a non-single crystal semiconductor pattern. A sacrificial non-single crystal semiconductor layer covers the preliminary active pattern and the semiconductor substrate. By crystallizing the sacrificial non-single crystal semiconductor layer and the non-single crystal semiconductor pattern, using the semiconductor substrate as a seed layer, the sacrificial non-single crystal semiconductor layer and the non-single crystal semiconductor pattern are changed to a sacrificial crystalline semiconductor layer and a crystalline semiconductor pattern, respectively. The crystalline semiconductor pattern and the barrier pattern constitute an active pattern. The sacrificial crystalline semiconductor layer is removed.
Claims
exact text as granted — not AI-modified1 . A semiconductor device comprising,
a semiconductor substrate having first source/drain regions; an active pattern on the semiconductor substrate, the active pattern comprising a barrier pattern and a single crystalline semiconductor pattern on the barrier pattern; and a gate pattern on the single crystalline semiconductor pattern.
2 . The semiconductor device according to claim 1 ,
wherein the single crystalline semiconductor pattern has second source/drain regions.
3 . The semiconductor device according to claim 2 ,
wherein the second source/drain regions are vertically aligned and disposed at both sides of the gate pattern.
4 . The semiconductor device according to claim 1 ,
wherein the first source/drain regions are vertically aligned and disposed at both sides of the gate pattern.
5 . The semiconductor device according to claim 1 ,
wherein the gate pattern comprises a gate insulating layer and a gate electrode on the gate insulating layer.
6 . The semiconductor device to claim 1 ,
wherein the gate pattern comprises a gate insulating layer and a gate electrode on the gate insulating layer.
7 . The semiconductor device according to claim 1 ,
wherein the semiconductor substrate and the single crystalline semiconductor pattern having the same single crystalline structures.Join the waitlist — get patent alerts
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