Voltage regulator

Abstract

Provided is a voltage regulator including a ripple rejection ratio improving circuit that requires no readjustment such as trimming for each output voltage. An output of the ripple rejection ratio improving circuit is connected to a back gate of a MOS transistor forming a current mirror section or a back gate of an input stage MOS transistor of an error amplifier circuit. With this construction, a ripple at a power supply terminal or a ground terminal and a ripple at an output terminal can be canceled with each other, thereby being capable of improving the ripple rejection ratio.

1 . A voltage regulator, comprising an error amplifier circuit for amplifying and outputting a difference between a divided voltage obtained by dividing a voltage output from an output transistor and a reference voltage, to thereby control a gate of the output transistor,
 wherein the error amplifier circuit comprises a ripple rejection ratio improving circuit provided to a back gate of a MOS transistor forming the error amplifier circuit.   
     
     
         2 . A voltage regulator according to  claim 1 , wherein:
 the ripple rejection ratio improving circuit comprises a resistor and a capacitor; and   a connection point between the resistor and the capacitor is connected to the back gate of the MOS transistor.   
     
     
         3 . A voltage regulator according to  claim 2 , wherein the MOS transistor forms a current mirror section. 
     
     
         4 . A voltage regulator according to  claim 2 , wherein the MOS transistor forms an input stage transistor.