US2012188834A1PendingUtilityA1

Semiconductor memory device and memory system having the same

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Assignee: KIM HO-YOUNGPriority: Jun 19, 2009Filed: Apr 6, 2012Published: Jul 26, 2012
Est. expiryJun 19, 2029(~2.9 yrs left)· nominal 20-yr term from priority
Inventors:Ho-Young KimHo-Cheol LeeJung-Bae Lee
G11C 7/22G11C 7/10G11C 7/1057G11C 2207/2272G11C 7/1078G11C 7/1066G11C 7/1051G11C 7/1084G11C 7/222
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Claims

Abstract

A semiconductor memory device is disclosed. The semiconductor device includes a memory cell array, a clock signal generator configured to receive an external clock signal from the outside of the memory device and output an internal clock signal, and a data output unit configured to receive an internal data signal from the memory cell array and output a read data signal in response to the internal clock signal. The semiconductor memory device also includes a read data strobe unit configured to output a read data strobe signal having a cycle time of n times (n is an integer equal to or more than 2) a cycle time of the internal clock signal, based on the internal clock signal.

Claims

exact text as granted — not AI-modified
1 . A semiconductor memory device, comprising:
 a memory cell array;   a clock signal generator configured to receive an external clock signal from the outside of the memory device and output an internal clock signal;   a data output unit configured to receive an internal data signal from the memory cell array and output a read data signal in response to the internal clock signal; and   a read data strobe unit configured to output a read data strobe signal having a cycle time of n times (n is an integer equal to or more than 2) a cycle time of the internal clock signal, based on the internal clock signal.   
     
     
         2 - 20 . (canceled)

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