Interference cancellation and improved signal-to-noise ratio circuits, systems, and methods

Abstract

Interference cancellation for wideband and narrowband communications systems is provided without apriori knowledge of statistical information about an interfering signal. In one embodiment a demodulator circuit can operate in an environment where a “no lock” situation would normally occur to remove the interference and acquire signals in low signal-to-noise ratio (SNR) conditions and high signal-to-interference ration (SIR) conditions. In other embodiments, performance is improved by introducing statistics of the interfering signal, and these statistics regarding the communications channel and interference properties (i.e., characteristics of the interfering signal) can be adaptive or “learned” in other embodiments.

1 . A demodulation circuit, comprising:
 an interference estimation circuit adapted to receive an input signal and generate an interference estimation signal from the input signal; and   an adaptive filtering circuit coupled to the interference estimation circuit and operable to perform spectral inversion on the estimation signal to obtain an inverted signal is then applied to the input signal to substantially cancel interference contained in the input signal.   
     
     
         2 . The demodulation circuit of  claim 1 , wherein the adaptive filtering circuit generates the inverted signal to cancel both in band and out of band interference present on the input signal. 
     
     
         3 . The demodulation circuit of  claim 2 , wherein the adaptive filtering circuit is operable to cancel one of two adjacent interfering signals. 
     
     
         4 . The demodulation circuit of  claim 3 , wherein the adaptive filtering circuit is operable to cancel both adjacent interfering signals. 
     
     
         5 . The demodulation circuit of  claim 1 , wherein the interference estimation circuit and adaptive filtering circuits are formed only from digital circuitry. 
     
     
         6 . The demodulation circuit of  claim 1 , wherein the interference estimation circuit comprises:
 an analog-to-digital converter adapted to receive in input signal having a desired signal and an interfering signal;   a complex multiplier circuit coupled to the analog-to-digital converter;   an adaptive low pass filter having an input coupled to the complex multiplier circuit and an output; and   an I-Q phase order circuit coupled to the adaptive low pass filter.   
     
     
         7 . The demodulation circuit of  claim 6  further comprising an I-Q delay circuit coupled to the output of the I-Q phase order circuit. 
     
     
         8 . An incoherent demodulator comprising: local oscillator circuitry for producing a pair of orthogonal carriers; a pair of analog mixers for incoherently demodulating a pair of modulated orthogonal signals with said orthogonal carriers to produce a pair of analog orthogonal baseband signals, there being a phase rotation in said analog orthogonal baseband signals resulting from the incoherent demodulation of said modulated signals; a pair of analog-to-digital converters for processing said analog orthogonal baseband signals to produce first and second digital signals; gain controlled circuitry for scaling the first digital signal, said gain controlled circuitry including averaging circuitry to produce a first average value representing an average power of a scaled first digital signal, and a second average value representing an average power of said second digital signal, such that a difference which exists between the average power of the scaled first digital signal and the average power of the second digital signal reduces to zero; and a digital phase shifter for processing first and second output signals of said gain controlled circuitry so that the processed first and second output signals no longer contain said phase rotation. 
     
     
         9 . The incoherent demodulator of  claim 8 , further comprising first and second automatic gain controlled circuits for respectively processing first and second digital output digital signals processed by said digital phase shifter to produce amplitude-controlled digital output whose amplitudes are maintained at a value. 
     
     
         10 . The incoherent demodulator of  claim 8 , wherein said gain controlled circuitry further comprises: a digital multiplier for multiplying said first digital signal with a control signal to produce the scaled first digital signal; and control circuitry for deriving a signal from said first and second average values and supplying the signal to said digital multiplier as said control signal so that a difference which exists between said first and second average values reduces to zero. 
     
     
         11 . The incoherent demodulator of  claim 10 , wherein said control circuitry is arranged to make a comparison between the first and second average values and derives said control signal from a result of the comparison. 
     
     
         12 . The incoherent demodulator of  claim 3 , wherein said control circuitry is arranged to determine a ratio between the first and second average values and derives said control signal from said ratio. 
     
     
         13 . The incoherent demodulator of  claim 8 , wherein said control circuitry comprises: a multiplier for multiplying one of said first and second average values by a scaling factor to produce a scaled average value; a comparator for producing a difference signal representing a difference between the scaled average value and the other one of said first and second average values; and an integrator for integrating said difference signal and supplying the integrated difference signal to said multiplier as said scaling factor, whereby the scaling factor represents said ratio between the first and second average values when said difference signal becomes equal to zero. 
     
     
         14 . The incoherent demodulator of  claim 8 , wherein said control circuitry comprises: a first multiplier for multiplying said first average value by a scaling factor to produce a scaled first average value; a second multiplier for multiplying said second average value by said scaling factor to produce a scaled second average value; a comparator for producing a difference signal representing a difference between the scaled second average value and 1; and an integrator for integrating said difference signal and supplying the integrated difference signal to said first and second multipliers as said scaling factor, whereby the scaled first average value represents said ratio between the first and second average values when the scaled second average value becomes equal to 1. 
     
     
         15 . The incoherent demodulator of  claim 8 , wherein said averaging circuitry includes said phase rotation in the calculation of said first average value representing the average power of the scaled first digital signal and said second average value representing the average power of said second digital signal. 
     
     
         16 . The incoherent demodulator of  claim 15 , wherein said gain controlled circuitry operates independently of the operation of said first and second automatic gain controlled circuits. 
     
     
         17 . The incoherent demodulator of  claim 16 , wherein said averaging circuitry includes said phase rotation in the calculation of said first average value representing the average power of the scaled first digital signal and said second average value representing the average power of said second digital signal. 
     
     
         18 . The incoherent demodulator of  claim 16 , wherein said gain controlled circuitry operates independently of the operation of said first and second automatic gain controlled circuits. 
     
     
         19 . A demodulation method, comprising:
 incoherently demodulating a pair of modulated orthogonal signals with a pair of orthogonal carriers to produce a pair of analog orthogonal baseband signals, there being a phase rotation in said analog orthogonal baseband signals resulting from the incoherent demodulation of said modulated signals; converting said analog orthogonal baseband signals to first and second digital signals;   scaling the first digital signal, to produce a first average value representing an average power of a scaled first digital signal, and a second average value representing an average power of said second digital signal, such that a difference which exists between the average power of the scaled first digital signal and the average power of the second digital signal reduces to zero; and   removing said phase rotation which exists between the scaled first digital signal and the second digital signal.   
     
     
         20 . The method of  claim 19 , wherein said scaling the first digital signal comprises: multiplying said first digital signal with a control signal to produce a scaled first digital signal; and deriving a signal from said first and second average values and using the signal as said control signal so that a difference which exists between said first and second average values reduces to zero. 
     
     
         21 . The method of  claim 19 , wherein said deriving a signal from said first and second average values comprises making a comparison between the first and second average values and deriving said control signal from a result of the comparison. 
     
     
         22 . The method of  claim 21 , wherein said deriving a signal from said first and second average values comprises determining a ratio between the first and second average values and deriving said control signal from said ratio. 
     
     
         23 . The method of  claim 19 , wherein incoherently demodulating includes providing an adaptive filtering circuit. 
     
     
         24 . The method of  claim 23 , wherein the adaptive filtering circuit is operable to cancel one of two adjacent interfering signals. 
     
     
         25 . The method of  claim 24 , wherein the adaptive filtering circuit is operable to cancel both adjacent interfering signals. 
     
     
         26 . The method of  claim 25 , wherein the adaptive filtering circuit is formed only from digital circuitry.