US2012168880A1PendingUtilityA1

Method of Fabricating Semiconductor Device

Assignee: ZHANG HONGYONGPriority: Nov 27, 1995Filed: Mar 15, 2012Published: Jul 5, 2012
Est. expiryNov 27, 2015(expired)· nominal 20-yr term from priority
Inventors:Hongyong Zhang
H10P 50/283H10W 20/082H10D 30/0321H10D 30/0314
55
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Claims

Abstract

Method of fabricating thin-film transistors in which contact with connecting electrodes becomes reliable. When contact holes are formed, the bottom insulating layer is subjected to a wet etching process, thus producing undercuttings inside the contact holes. In order to remove the undercuttings, a light etching process is carried out to widen the contact holes. Thus, tapering section are obtained, and the covering of connection wiring is improved.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device comprising:
 a semiconductor substrate including at least a source region and a drain region;   a first insulating film over the semiconductor substrate;   a second insulating film over the first insulating film;   a first opening in the first insulating film to reach one of the source region and the drain region;   a second opening in the second insulating film, said second opening being located over the first opening; and   an electrode electrically connected to one of the source region and the drain region through said first opening and said second opening,   wherein an edge of at least said second opening are rounded off,   wherein a first tilt angle from a bottom of the first opening in the first insulating film is smaller than a second tilt angle of the second opening in the second insulating film,   wherein the electrode is in contact with the first insulating film in the first opening and the second insulating film in the second opening,   wherein the electrode fills the first opening and the second opening, and   wherein the electrode does not cover the edge of the second opening, which is rounded off.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein said semiconductor substrate is a single-crystal silicon wafer. 
     
     
         3 . The semiconductor device according to  claim 1 , wherein said source region and said drain region contain phosphorus or boron. 
     
     
         4 . The semiconductor device according to  claim 1 , wherein said first insulating film and said second insulating film are formed from a same material. 
     
     
         5 . The semiconductor device according to  claim 1 , wherein at least any one of said first insulating film and said second insulating film are formed from silicon nitride. 
     
     
         6 . The semiconductor device according to  claim 1 , wherein a composition ratio of the first insulating film is different from a composition ratio of the second insulating film. 
     
     
         7 . The semiconductor device according to  claim 1 , wherein an etching rate of the first insulating film is different from an etching rate of the second insulating film. 
     
     
         8 . The semiconductor device according to  claim 1 , wherein an etching rate of the second insulating film is higher than an etching rate of the first insulating film. 
     
     
         9 . The semiconductor device according to  claim 1 , wherein a film property of the first insulating film is different from a film property of the second insulating film. 
     
     
         10 . The semiconductor device according to  claim 1 , wherein a film thickness of the second insulating film is greater than a film thickness of the first insulating film. 
     
     
         11 . The semiconductor device according to  claim 1 , wherein said electrode is formed over the second insulating film. 
     
     
         12 . A semiconductor device comprising:
 a semiconductor substrate including at least a source region and a drain region;   a first insulating film over the semiconductor substrate;   a second insulating film over the first insulating film;   a first opening in the first insulating film to reach one of the source region and the drain region;   a second opening in the second insulating film, said second opening being located over the first opening; and   an electrode electrically connected to one of the source region and the drain region through said first opening and said second opening,   wherein the first insulating film has a first tilt angle from a bottom of the first opening,   wherein the second insulating film has a second tilt angle from a bottom of the second opening, and an edge of the second opening has a third tilt angle, which is different from the second tilt angle, at a top of the second opening,   wherein the first tilt angle is smaller than the second tilt angle,   wherein the electrode is in contact with the first insulating film in the first opening and the second insulating film in the second opening,   wherein the electrode fills the first opening and the second opening, and   wherein the electrode does not cover the top of the second opening, which has the third tilt angle.   
     
     
         13 . The semiconductor device according to  claim 12 , wherein said semiconductor substrate is a single-crystal silicon wafer. 
     
     
         14 . The semiconductor device according to  claim 12 , wherein said source region and said drain region contain phosphorus or boron. 
     
     
         15 . The semiconductor device according to  claim 12 , wherein said first insulating film and said second insulating film are formed from a same material. 
     
     
         16 . The semiconductor device according to  claim 12 , wherein at least any one of said first insulating film and said second insulating film are formed from silicon nitride. 
     
     
         17 . The semiconductor device according to  claim 12 , wherein a composition ratio of the first insulating film is different from a composition ratio of the second insulating film. 
     
     
         18 . The semiconductor device according to  claim 12 , wherein an etching rate of the first insulating film is different from an etching rate of the second insulating film. 
     
     
         19 . The semiconductor device according to  claim 12 , wherein an etching rate of the second insulating film is higher than an etching rate of the first insulating film. 
     
     
         20 . The semiconductor device according to  claim 12 , wherein a film property of the first insulating film is different from a film property of the second insulating film. 
     
     
         21 . The semiconductor device according to  claim 12 , wherein a film thickness of the second insulating film is greater than a film thickness of the first insulating film. 
     
     
         22 . The semiconductor device according to  claim 12 , wherein said electrode is formed over the second insulating film. 
     
     
         23 . A semiconductor device comprising:
 a semiconductor substrate including at least a source region and a drain region;   a gate electrode over the semiconductor substrate with a gate insulating film interposed therebetween, wherein said gate electrode comprises at least one material selected from the group consisting of a metal material, a silicide material and a semiconductor material;   a first insulating film formed over the semiconductor substrate and the gate electrode;   a second insulating film formed on the first insulating film;   a contact hole formed in the first and second insulating films to reach one of the source region and the drain region; and   an electrode electrically connected to one of the source region and the drain region through said contact hole,   wherein an edge of said contact hole is rounded off at a top of said contact hole,   wherein an inner side surface of the first insulating film in the contact hole at a bottom of the first insulating film has a first taper angle and an inner side surface of the second insulating film in the contact hole has a second taper angle, and the first taper angle is smaller than the second taper angle,   wherein the electrode is in contact with the first insulating film and the second insulating film in the contact hole,   wherein the electrode fills the contact hole, and   wherein the electrode does not cover the top of the contact hole, which is rounded off.   
     
     
         24 . The semiconductor device according to  claim 23 , wherein said semiconductor substrate is a single-crystal silicon wafer. 
     
     
         25 . The semiconductor device according to  claim 23 , wherein said source region and said drain region contain phosphorus or boron. 
     
     
         26 . The semiconductor device according to  claim 23 , wherein said first insulating film and said second insulating film are formed from a same material. 
     
     
         27 . The semiconductor device according to  claim 23 , wherein at least any one of said first insulating film and said second insulating film are formed from silicon nitride. 
     
     
         28 . The semiconductor device according to  claim 23 , wherein a composition ratio of the first insulating film is different from a composition ratio of the second insulating film. 
     
     
         29 . The semiconductor device according to  claim 23 , wherein an etching rate of the first insulating film is different from an etching rate of the second insulating film. 
     
     
         30 . The semiconductor device according to  claim 23 , wherein an etching rate of the second insulating film is higher than an etching rate of the first insulating film. 
     
     
         31 . The semiconductor device according to  claim 23 , wherein a film property of the first insulating film is different from a film property of the second insulating film. 
     
     
         32 . The semiconductor device according to  claim 23 , wherein a film thickness of the second insulating film is greater than a film thickness of the first insulating film. 
     
     
         33 . The semiconductor device according to  claim 23 , wherein the gate insulating film and the first insulating film are formed from different materials. 
     
     
         34 . The semiconductor device according to  claim 23 , wherein the contact hole is formed in the gate insulating film. 
     
     
         35 . The semiconductor device according to  claim 23 , wherein said electrode is formed over the second insulating film. 
     
     
         36 . A semiconductor device comprising:
 a semiconductor substrate including at least a source region and a drain region;   a gate electrode over the semiconductor substrate with a gate insulating film interposed therebetween, wherein said gate electrode comprises at least one material selected from the group consisting of a metal material, a silicide material and a semiconductor material;   a first insulating film formed over the semiconductor substrate and the gate electrode;   a second insulating film formed on the first insulating film;   a contact hole formed in the first and second insulating films to reach one of the source region and the drain region; and   an electrode electrically connected to one of the source region and the drain region through said contact hole,   wherein an inner side surface of the first insulating film in the contact hole at a bottom of the first insulating film has a first taper angle and an inner side surface of the second insulating film in the contact hole at a bottom of the second insulating film has a second taper angle, an edge of the contact hole has a third taper angle, which is different from the second taper angle, at a top of the contact hole, and the first taper angle is smaller than the second taper angle,   wherein the electrode is in contact with the first insulating film and the second insulating film in the contact hole,   wherein the electrode fills the contact hole, and   wherein the electrode does not cover the top of the contact hole, which has the third taper angle.   
     
     
         37 . The semiconductor device according to  claim 36 , wherein said semiconductor substrate is a single-crystal silicon wafer. 
     
     
         38 . The semiconductor device according to  claim 36 , wherein said source region and said drain region contain phosphorus or boron. 
     
     
         39 . The semiconductor device according to  claim 36 , wherein said first insulating film and said second insulating film are formed from a same material. 
     
     
         40 . The semiconductor device according to  claim 36 , wherein at least any one of said first insulating film and said second insulating film are formed from silicon nitride. 
     
     
         41 . The semiconductor device according to  claim 36 , wherein a composition ratio of the first insulating film is different from a composition ratio of the second insulating film. 
     
     
         42 . The semiconductor device according to  claim 36 , wherein an etching rate of the first insulating film is different from an etching rate of the second insulating film. 
     
     
         43 . The semiconductor device according to  claim 36 , wherein an etching rate of the second insulating film is higher than an etching rate of the first insulating film. 
     
     
         44 . The semiconductor device according to  claim 36 , wherein a film property of the first insulating film is different from a film property of the second insulating film. 
     
     
         45 . The semiconductor device according to  claim 36 , wherein a film thickness of the second insulating film is greater than a film thickness of the first insulating film. 
     
     
         46 . The semiconductor device according to  claim 36 , wherein the gate insulating film and the first insulating film are formed from different materials. 
     
     
         47 . The semiconductor device according to  claim 36 , wherein the contact hole is formed in the gate insulating film. 
     
     
         48 . The semiconductor device according to  claim 36 , wherein said electrode is formed over the second insulating film. 
     
     
         49 . A semiconductor device comprising:
 a semiconductor substrate including at least a source region and a drain region;   a gate electrode over the semiconductor substrate with a gate insulating film interposed therebetween;   a first insulating film formed over the semiconductor substrate and the gate electrode;   a second insulating film formed on the first insulating film;   a contact hole formed in the first and second insulating films to reach at least one of the source region and the drain region; and   an electrode electrically connected to at least one of the source region and the drain region through said contact hole,   wherein an inner side surface of the first insulating film in the contact hole at a bottom of the first insulating film has a first taper angle and an inner side surface of the second insulating film in the contact hole at a bottom of the second insulating film has a second taper angle, an edge of the contact hole has a third taper angle, which is different from the second taper angle, at a top of the contact hole, and the first taper angle is smaller than the second taper angle,   wherein the electrode is in contact with the first insulating film and the second insulating film in the contact hole,   wherein the electrode fills the contact hole, and   wherein the electrode does not cover the top of the contact hole, which has the third taper angle.   
     
     
         50 . The semiconductor device according to  claim 49 , wherein said semiconductor substrate is a single-crystal silicon wafer. 
     
     
         51 . The semiconductor device according to  claim 49 , wherein said source region and said drain region contain phosphorus or boron. 
     
     
         52 . The semiconductor device according to  claim 49 , wherein said first insulating film and said second insulating film are formed from a same material. 
     
     
         53 . The semiconductor device according to  claim 49 , wherein at least any one of said first insulating film and said second insulating film are formed from silicon nitride. 
     
     
         54 . The semiconductor device according to  claim 49 , wherein a composition ratio of the first insulating film is different from a composition ratio of the second insulating film. 
     
     
         55 . The semiconductor device according to  claim 49 , wherein an etching rate of the first insulating film is different from an etching rate of the second insulating film. 
     
     
         56 . The semiconductor device according to  claim 49 , wherein an etching rate of the second insulating film is higher than an etching rate of the first insulating film. 
     
     
         57 . The semiconductor device according to  claim 49 , wherein a film property of the first insulating film is different from a film property of the second insulating film. 
     
     
         58 . The semiconductor device according to  claim 49 , wherein a film thickness of the second insulating film is greater than a film thickness of the first insulating film. 
     
     
         59 . The semiconductor device according to  claim 49 , wherein the gate insulating film and the first insulating film are formed from different materials. 
     
     
         60 . The semiconductor device according to  claim 49 , wherein the contact hole is formed in the gate insulating film. 
     
     
         61 . The semiconductor device according to  claim 49 , wherein said electrode is formed over the second insulating film.

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