Conductive nitride semiconductor substrate and method for producing the same

Abstract

A method for producing a conductive nitride semiconductor substrate circuit includes the steps of forming, on an underlying substrate, a mask including dot or stripe masking portions having a width or diameter of 10 to 100 μm and arranged at a spacing of 250 to 10,000 μm; growing a nitride semiconductor crystal on the underlying substrate by hydride vapor phase epitaxy (HVPE) at a growth temperature of 1,040° C. to 1,150° C. by supplying a group III source gas, a group V source gas, and a silicon-containing gas in a V/III ratio of 1 to 10; and removing the underlying substrate, thus forming a free-standing conductive nitride semiconductor crystal substrate having a resistivity r of 0.0015 Ωcm≦r≦0.01 Ωcm, a thickness of 100 μm or more, and a radius of bow curvature U of 3.5 m≦U≦8 m.

1 - 17 . (canceled) 
     
     
         18 . A conductive nitride semiconductor substrate comprising a bottom portion, an inner portion, and a surface portion in order in a crystal growth direction,
 the bottom portion and the inner portion including crystal defect cluster regions H, low-dislocation-density single-crystal regions Z, and a c-plane growth region Y periodically arranged in the order of the crystal defect cluster regions H, the low-dislocation-density single-crystal regions Z, the c-plane growth region Y, and the low-dislocation-density single-crystal regions Z in a direction perpendicular to the growth direction, thereby forming an HZYZHZYZ . . . structure,   the crystal defect cluster regions H in the bottom portion and the inner portion having a width or diameter of 10 to 100 μm in a cross section perpendicular to the growth direction, ZYZ portions defined between the adjacent crystal defect cluster regions H having a width of 250 to 10,000 μm,   the surface portion including the c-plane growth region Y and not including the crystal defect cluster regions H or the low-dislocation-density single-crystal regions Z,   the low-dislocation-density single-crystal regions Z and the crystal defect cluster regions H being doped with silicon and oxygen, the c-plane growth region Y being doped with silicon,   the conductive nitride semiconductor substrate having a thickness of 100 μm or more, a diameter of 18 mm or more, a cracking ratio K of 1%≦K≦22%, a radius of bow curvature U of 3.5 m≦U≦8 m, and a resistivity r of 0.0015 Ωcm≦r≦0.01 Ωcm.   
     
     
         19 . The conductive nitride semiconductor substrate according to  claim 18 , wherein the resistivity r is 0.0018 Ωcm≦r≦0.01 Ωcm. 
     
     
         20 . A conductive nitride semiconductor substrate according to  claim 18  comprising a bottom portion, an inner portion, and a surface portion in order in a crystal growth direction,
 the bottom portion and the inner portion including crystal defect cluster regions H, low-dislocation-density single-crystal regions Z, and c-plane growth regions Y periodically arranged in the order of the crystal defect cluster regions H, the low-dislocation-density single-crystal regions Z, the c-plane growth regions Y, and the low-dislocation-density single-crystal regions Z in a direction perpendicular to the growth direction, thereby forming an HZYZHZYZ . . . structure, 
 the crystal defect cluster regions H in the bottom portion and the inner portion forming a pattern of parallel stripes having a width of 10 to 100 μm in a cross section perpendicular to the growth direction, ZYZ portions defined between the adjacent crystal defect cluster regions H having a width of 250 to 10,000 μm, 
 the surface portion including the c-plane growth regions Y and not including the crystal defect cluster regions H or the low-dislocation-density single-crystal regions Z, 
 the low-dislocation-density single-crystal regions Z and the crystal defect cluster regions H being doped with silicon and oxygen, the c-plane growth regions Y being doped with silicon, 
 the conductive nitride semiconductor substrate having a thickness of 100 μm or more, a diameter of 18 mm or more, a cracking ratio K of 1%≦K≦22%, a radius of bow curvature U of 4.0 m≦U≦8 m, and a resistivity r of 0.0018 Ωcm≦r≦0.01 Ωcm. 
 
     
     
         21 . A conductive nitride semiconductor substrate according to  claim 18  comprising a bottom portion, an inner portion, and a surface portion in order in a crystal growth direction,
 the bottom portion and the inner portion including crystal defect cluster regions H, low-dislocation-density single-crystal regions Z, and a c-plane growth region Y periodically arranged in the order of the crystal defect cluster regions H, the low-dislocation-density single-crystal regions Z, the c-plane growth region Y, and the low-dislocation-density single-crystal regions Z in a direction perpendicular to the growth direction, thereby forming an HZYZHZYZ . . . structure, 
 the crystal defect cluster regions H in the bottom portion and the inner portion forming a pattern of dots having a diameter of 10 to 100 μm in a cross section perpendicular to the growth direction, ZYZ portions defined between the adjacent crystal defect cluster regions H having a width of 250 to 10,000 μm, 
 the surface portion including the c-plane growth region Y and not including the crystal defect cluster regions H or the low-dislocation-density single-crystal regions Z, 
 the low-dislocation-density single-crystal regions Z and the crystal defect cluster regions H being doped with silicon and oxygen, the c-plane growth region Y being doped with silicon, 
 the conductive nitride semiconductor substrate having a thickness of 100 μm or more, a diameter of 18 mm or more, a cracking ratio K of 4%≦K≦13%, a radius of bow curvature U of 3.5 m≦U≦4.8 m, and a resistivity r of 0.005 Ωcm≦r≦0.009 Ωcm. 
 
     
     
         22 . The conductive nitride semiconductor substrate according to  claim 19 , wherein if the resistivity of the conductive nitride semiconductor substrate is denoted by r and the silicon concentration of the conductive nitride semiconductor substrate is denoted by [Si], the resistivity is represented by the following equation:
   log  r= 3.55−0.311 log [Si]
   (where log is a common logarithm).   
     
     
         23 . The conductive nitride semiconductor substrate according to  claim 19 , wherein if the resistivity r of the conductive nitride semiconductor substrate is expressed as r′×10 −3  Ωcm and the silicon concentration [Si] of the conductive nitride semiconductor substrate is expressed as [Si′]×10 18  cm −3 , the resistivity is represented by the following equation:
   log  r′=− 0.311 log [Si′]+0.954
 
 (where log is a common logarithm). 
 
     
     
         24 . The conductive nitride semiconductor substrate according to claim  19 , wherein if the resistivity r of the conductive nitride semiconductor substrate is expressed as r′×10 −3  Ωcm and the silicon concentration [Si] of the conductive nitride semiconductor substrate is expressed as [Si′]×10 18  cm −3 , the resistivity is represented by the following equation:
   0.689≦log  r′+ 0.311 log [Si′]≦1.032
 
 (where log is a common logarithm). 
 
     
     
         25 . The conductive nitride semiconductor substrate according to  claim 18 , wherein the cracking ratio K is 3% 18%, the radius of bow curvature U is 4.2 m≦U≦6.5 m, and the resistivity r is 0.0015 Ωcm≦r≦0.008 Ωcm. 
     
     
         26 . A conductive nitride semiconductor substrate according to  claim 18  comprising crystal defect cluster regions H, low-dislocation-density single-crystal regions Z, and c-plane growth regions Y periodically arranged in the order of the crystal defect cluster regions H, the low-dislocation-density single-crystal regions Z, the c-plane growth regions Y, and the low-dislocation-density single-crystal regions Z in a direction perpendicular to a crystal growth direction, thereby forming an HZYZHZYZ . . . structure,
 the crystal defect cluster regions H forming a pattern of parallel stripes having a width of 10 to 100 μm in a cross section perpendicular to the growth direction, ZYZ portions defined between the adjacent crystal defect cluster regions H having a width of 250 to 10,000 μm, the low-dislocation-density single-crystal regions Z and the crystal defect cluster regions H being doped with silicon and oxygen, the c-plane growth regions Y being doped with silicon, 
 the conductive nitride semiconductor substrate having a thickness of 100 μm or more, a diameter of 18 mm or more, a cracking ratio K of 5%≦K≦18%, a radius of bow curvature U of 4.8 m≦U≦6.5 m, and a resistivity r of 0.0015 Ωcm≦r≦0.008 Ωcm. 
 
     
     
         27 . A conductive nitride semiconductor substrate according to  claim 18  comprising crystal defect cluster regions H, low-dislocation-density single-crystal regions Z, and a c-plane growth region Y periodically arranged in the order of the crystal defect cluster regions H, the low-dislocation-density single-crystal regions Z, the c-plane growth region Y, and the low-dislocation-density single-crystal regions Z in a direction perpendicular to a crystal growth direction, thereby forming an HZYZHZYZ . . . structure,
 the crystal defect cluster regions H forming a pattern of dots having a diameter of 10 to 100 μm in a cross section perpendicular to the growth direction, ZYZ portions defined between the adjacent crystal defect cluster regions H having a width of 250 to 10,000 μm, 
 the low-dislocation-density single-crystal regions Z and the crystal defect cluster regions H being doped with silicon and oxygen, the c-plane growth region Y being doped with silicon, 
 the conductive nitride semiconductor substrate having a thickness of 100 μm or more, a diameter of 18 mm or more, a cracking ratio K of 3%≦K≦6%, a radius of bow curvature U of 4.2 m≦U≦5 m, and a resistivity r of 0.004 Ωcm≦r≦0.008 Ωcm. 
 
     
     
         28 . The conductive nitride semiconductor substrate according to  claim 25 , wherein if the resistivity r of the conductive nitride semiconductor substrate is expressed as r′×10 −3  Ωcm, the silicon concentration [Si] of the conductive nitride semiconductor substrate is expressed as [Si′]×10 18  cm −3 , and the oxygen concentration [O] of the conductive nitride semiconductor substrate is expressed as [O′]×10 18  cm −3 , the resistivity is represented by the following equation:
   log  r′=− 0.311 log(1.6[O′]+[Si′])+1.032
 
 
     
     
         29 . The conductive nitride semiconductor substrate according to  claim 25 , wherein if the resistivity r of the conductive nitride semiconductor substrate is expressed as r′×10 −3  Ωcm, the silicon concentration [Si] of the conductive nitride semiconductor substrate is expressed as [Si′]×10 18  cm −3 , and the oxygen concentration [O] of the conductive nitride semiconductor substrate is expressed as [O′]×10 18  cm −3 , the resistivity is represented by the following equation:
   log  r′=− 0.311 log([O′]+[Si′])+0.62
 
 
     
     
         30 . The conductive nitride semiconductor substrate according to  claim 25 , wherein if the resistivity r of the conductive nitride semiconductor substrate is expressed as r′×10 −3  Ωcm, the silicon concentration [Si] of the conductive nitride semiconductor substrate is expressed as [Si′]×10 18  cm −3 , and the oxygen concentration [O] of the conductive nitride semiconductor substrate is expressed as [O′]×10 18  cm −3 , the resistivity is represented by the following equation:
   log  r′=− 0.311 log(K[O′]+[Si′])+S
 
 (where K is 1 to 1.6 and S is 0.62 to 1.032). 
 
     
     
         31 . The conductive nitride semiconductor substrate according to  claim 25 , wherein if the resistivity r of the conductive nitride semiconductor substrate is expressed as r′×10 −3  Ωcm, the silicon concentration [Si] of the conductive nitride semiconductor substrate is expressed as [Si′]×10 18  cm −3 , and the oxygen concentration [O] of the conductive nitride semiconductor substrate is expressed as [O′]×10 18  cm −3 , the resistivity is represented by the following equation:
   log  r′= 1.478−log {[Si′]+[O′]}
 
 
     
     
         32 . The conductive nitride semiconductor substrate according to  claim 25 , wherein if the resistivity r of the conductive nitride semiconductor substrate is expressed as r′×10 −3  Ωcm, the silicon concentration [Si] of the conductive nitride semiconductor substrate is expressed as [Si′]×10 18  cm −3 , and the oxygen concentration [O] of the conductive nitride semiconductor substrate is expressed as [O′]×10 18  cm −3 , the resistivity is represented by the following equation:
     r′= 30/{[Si′]+[O′]}
 
 
     
     
         33 . The conductive nitride semiconductor substrate according to  claim 25 , wherein if the resistivity r of the conductive nitride semiconductor substrate is expressed as r′×10 −3  Ωcm, the silicon concentration [Si] of the conductive nitride semiconductor substrate is expressed as [Si′]×10 18  cm −3 , and the oxygen concentration [O] of the conductive nitride semiconductor substrate is expressed as [O′]×10 18  cm −3 , the resistivity is represented by the following inequality:
   0.9213−0.5728 log {[Si′]+[O′]}≦log  r′≦ 1.478−log {[Si′]+[O′]}
 
 
     
     
         34 . The conductive nitride semiconductor substrate according to  claim 25 , wherein if the resistivity r of the conductive nitride semiconductor substrate is expressed as r′×10 −3  Ωcm, the silicon concentration [Si] of the conductive nitride semiconductor substrate is expressed as [Si′]×10 18  cm −3 , and the oxygen concentration [O] of the conductive nitride semiconductor substrate is expressed as [O′]×10 18  cm −3 , the resistivity is represented by the following inequality:
   8.34257/{[Si′]+[O′]} 0.5728   ≦r′≦ 30/{[Si′]+[O′]}