Semiconductor device with vertical gate and method for fabricating the same

Abstract

A semiconductor device includes a substrate; a plurality of active pillars formed over the substrate; bulb-type trenches, each of the bulb-type trenches formed inside the substrate between the active pillars; buried bit lines, each of the buried bit lines being formed on a sidewall of a respective one of the bulb-type trenches; and vertical gates, each of the vertical gates being formed to surround a sidewall of a respective one of the active pillars.

1 . A semiconductor device, comprising:
 a substrate;   a plurality of active pillars formed over the substrate;   bulb-type trenches, each of the bulb-type trenches formed inside the substrate between the active pillars;   buried bit lines, each of the buried bit lines being formed on a sidewall of a respective one of the bulb-type trenches; and   vertical gates, each of the vertical gates being formed to surround a sidewall of a respective one of the active pillars.   
     
     
         2 . The semiconductor device of  claim 1 , wherein the plurality of active pillars are arrayed with a first space and a second space, the second space being narrower than the first space. 
     
     
         3 . The semiconductor device of  claim 2 , wherein the plurality of active pillars include a number of active pillar array pairs wherein the active pillar array pairs are arranged with the second space therebetween and active pillar arrays in each active pillar array pair are arranged with the first space therebetween, the second space being narrower than the first space. 
     
     
         4 . The semiconductor device of  claim 3 , wherein the bulb-type trenches are formed inside the substrate beneath the first space. 
     
     
         5 . The semiconductor device of  claim 1 , further comprising:
 a trench under each of the bulb-type trenches.   
     
     
         6 . The semiconductor device of  claim 1 , wherein the active pillars include a neck-free structure. 
     
     
         7 . The semiconductor device of  claim 1 , wherein the buried bit lines include a metal layer or a metal nitride layer. 
     
     
         8 . semiconductor device of  claim 7 , wherein the buried bit lines include a tungsten (W) layer or a titanium nitride (TiN) layer. 
     
     
         9 - 20 . (canceled)