Fluid ejection nozzle having stacked capacitive ejector
Abstract
A fluid ejection nozzle arrangement is provided having drive circuitry deposited on a substrate, subsequent etchant layers deposited on the drive circuitry to define a nozzle chamber with walls and a roof structure defining a fluid ejection port, and a stacked capacitive actuator arranged in the chamber. The actuator has alternate electrode plates sandwiched between a compressible polymer. Activation of the stacked actuator draws the electrode plates together to compress the polymer storing energy therein, with subsequent de-activation releasing the energy to eject fluid within the chamber from the ejection port.
Claims
exact text as granted — not AI-modified1 . A fluid ejection nozzle arrangement comprising:
drive circuitry deposited on a substrate; subsequent etchant layers deposited on the drive circuitry to define a nozzle chamber with walls and a roof structure defining a fluid ejection port; and a stacked capacitive actuator arranged in said chamber, said actuator having electrode plates sandwiched alternately between a compressible polymer, wherein activation of the stacked actuator draws the electrode plates together to compress the polymer storing energy therein, with subsequent de-activation releasing said energy to eject fluid within said chamber from the ejection port.
2 . An arrangement according to claim 1 , wherein the electrode actuator is constructed according to chemical vapor deposition (CVD) techniques.
3 . An arrangement according to claim 1 , wherein the electrode plates comprise separate metals.
4 . An arrangement according to claim 3 , wherein the electrodes are comprised of alternating aluminium and tantalum plates.
5 . An arrangement according to claim 4 , wherein the alternating metal plates define electrodes on opposite sides of the actuator, said corresponding electrodes electrically isolated from each other and connected to the drive circuitry.
6 . An arrangement according to claim 1 , wherein the layer of drive circuitry is a two-level metal CMOS layer.
7 . An arrangement according to claim 1 , wherein the polymer comprises styrene-ethylene-butylene-styrene block copolymer.Join the waitlist — get patent alerts
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