US2012087378A1PendingUtilityA1

Method and Apparatus for Producing Gallium Arsenide and Silicon Composites and Devices Incorporating Same

Assignee: ULLRICH BRUNOPriority: Feb 6, 2004Filed: Apr 11, 2011Published: Apr 12, 2012
Est. expiryFeb 6, 2024(expired)· nominal 20-yr term from priority
H10F 71/1276H10F 30/222C30B 29/42C30B 25/105Y02E10/544
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Claims

Abstract

The present invention includes methods for producing GaAs/Si composites, GaAs/Si composites, apparatus for preparing GaAs/Si composites, and a variety of electronic and photoelectric circuits and devices incorporating GaAs/Si composites of the present invention.

Claims

exact text as granted — not AI-modified
1 . An electronic circuit comprising a rectifier, said rectifier comprising a layered article comprising:
 (a) a first layer comprising silicon; and   (b) a second layer comprising gallium arsenide said gallium arsenide of said first layer being layered onto said silicon of said second layer in a substantially stoichiometric ratio, and whereby said layer of gallium arsenide deposited upon said silicon has a smoothness variation less than about 100 nanometers.   
       Memory/Logic/Multiplexer Devices including a Layered article of Gallium Arsenide upon Silicon Substrate 
     
     
         2 . A memory device comprising:
 (a) a field effect transistor comprising a GaAs/Si composite comprising:
 (i) a first layer comprising silicon; and 
 (ii) a second layer comprising gallium arsenide; 
   said gallium arsenide of said first layer being layered onto said silicon of said second layer uniformly and in a substantially stoichiometric ratio.   
     
     
         3 . A logic device comprising:
 (a) one or more input lines associated with one or more output lines according to a logic algorithm;   (b) at least one signal input device associated with said one or more input lines, and least one signal output device associated with said one or more output lines;
 at least one of said at least one signal input device and at least one signal output device being optical or electrical; and 
   (c) a logic algorithm device for associating said one or more input lines associated with one or more output lines, said device comprising:
 (i) a first layer comprising silicon; and 
 (ii) a second layer comprising gallium arsenide; 
   said gallium arsenide of said first layer being layered onto said silicon of said second layer uniformly and in a substantially stoichiometric ratio.   
     
     
         4 . A multiplexer device comprising:
 (a) a plurality of input lines associated with a respective number of data sources, and an output line, and   (b) a data selector;   each of said input lines adapted to transfer data to said output line when said data selector selects it, said data selector comprising:   (i) a first layer comprising silicon; and   (ii) a second layer comprising gallium arsenide;   said gallium arsenide of said first layer being layered onto said silicon of said second layer uniformly and in a substantially stoichiometric ratio.   
     
     
         5 . A multiplexer device according to  claim 4  wherein said plurality of input lines are optical input lines and wherein said output line is an electrical output line, and wherein the data on the optical input line once selected by the data selector is converted and transferred to the electrical output line when a bias voltage is applied to said device.

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