Damascene interconnection structure and dual damascene process thereof
Abstract
A dual damascene structure is disclosed. The dual damascene structure includes: a substrate comprising thereon a base dielectric layer and a lower wiring layer inlaid in the base dielectric layer; a dielectric layer on the substrate; a via opening in the dielectric layer, wherein the via opening misaligns with the lower wiring layer thus exposing a portion of the lower wiring layer and a portion of the base dielectric layer, wherein the via opening comprises a bottom including a recessed area; a barrier layer lining interior surface of the via opening and covers the exposed lower wiring layer and the base dielectric layer, wherein only the barrier layer fills the recessed area; and a copper layer filling the via opening on the barrier layer.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A dual damascene structure, comprising:
a substrate comprising thereon a base dielectric layer and a lower wiring layer inlaid in the base dielectric layer; a dielectric layer on the substrate; a via opening in the dielectric layer, wherein the via opening misaligns with the lower wiring layer thus exposing a portion of the lower wiring layer and a portion of the base dielectric layer, wherein the via opening comprises a bottom including a recessed area; a barrier layer lining interior surface of the via opening and covers the exposed lower wiring layer and the base dielectric layer, wherein only the barrier layer fills the recessed area; and a copper layer filling the via opening on the barrier layer.
2 . The dual damascene structure of claim 1 wherein the base dielectric layer comprises organosilicate glass.
3 . The dual damascene structure of claim 1 wherein the base dielectric layer comprises C, H-doped silicon oxide dielectric.
4 . The dual damascene structure of claim 1 wherein the dielectric layer has a dielectric constant that is less than 3.
5 . The dual damascene structure of claim 1 wherein a step height between the recessed area and a top surface of the lower wiring layer is less than 150 angstroms.
6 . The dual damascene structure of claim 1 wherein a step height between the recessed area and a top surface of the lower wiring layer is less than 50 angstroms.
7 . The dual damascene structure of claim 1 further comprising a cap layer capping the lower wiring layer and the base dielectric layer.
8 . The dual damascene structure of claim 7 wherein the cap layer comprises nitrogen doped silicon carbide (SiCN).
9 . The dual damascene structure of claim 7 wherein the cap layer comprises SiCN, SiN, SiON, SiC, or SiCO.
10 . The dual damascene structure of claim 7 wherein the cap layer has a thickness of 300-800 angstroms.Join the waitlist — get patent alerts
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