Semiconductor Memory Device

Abstract

Disclosed herein is a semiconductor memory device for reducing a junction resistance and increasing amount of current throughout the unit cell. A semiconductor memory device comprises plural unit cells, each coupled to contacts formed in different shape at both sides of a word line in a cell array.

What is claimed is: 
     
         1 . A method for manufacturing a semiconductor memory device, comprising:
 forming contacts having different shape at both sides of word lines included in a cell array, wherein the contacts are formed in every unit cell.   
     
     
         2 . The method according to  claim 1 , further comprising:
 forming the word lines crossed over plural active regions included in the cell array, wherein every one or two word lines is formed over single active region; and   performing ion-implantation to form source/drain in each of the plural active regions.   
     
     
         3 . The method according to  claim 2 , wherein the forming-contacts-having-different-shape includes:
 forming a first contact having an island shape on the drain of the active region; and   forming a second contact having a line shape on the source of the active region.   
     
     
         4 . The method according to  claim 3 , wherein the unit cells aligned in a direction of the word line hold the second contact in common. 
     
     
         5 . The method according to  claim 3 , further comprising:
 forming a bit line on the first contact, wherein the bit line is arranged in a cross-direction of the word line; and   forming a source line on the second contact, wherein the source line is arranged in a direction of the word line.