Dicing Before Grinding Process for Preparation of Semiconductor

Abstract

A method for preparing a semiconductor wafer into individual semiconductor dies using both a dicing before grinding operation and a wafer back side adhesive coating includes the step of applying a water or organic solvent soluble material into the partially cut/etched dicing lines and over the top surface of the circuits to prevent the ingress of wafer back side coating into the dicing streets and interference during singulation.

1 . A method for preparing a semiconductor wafer having a plurality of circuits on the top side of the wafer into individual semiconductor dies comprising the steps of:
 (1) forming dicing lines into the top side of the wafer between adjacent circuits;   (2) applying a water or organic solvent soluble material into the dicing lines and over the top surface of the circuits;   (3) laminating a protection layer onto the top side of the wafer and over the water or organic solvent soluble material;   (4) thinning the wafer by removing material from the back side of the wafer;   (5) applying an adhesive coating to the back side of the wafer;   (6) removing the protection tape from the top side of the wafer;   (7) removing the water soluble or organic solvent soluble material from the dicing lines between the circuits; and   (8) separating the wafer along the dicing lines into individual circuits.   
     
     
         2 . The method according to  claim 1  in which the water or organic solvent soluble material is a water soluble material selected from the group consisting of polyvinyl alcohol, water-soluble cellulosics, gelatin, starches and polysaccharides, polyethylene oxides, polyvinyl pyrollidone, sulfonated polystyrenes, and polymers derived from ethylenically unsaturated monomers containing hydrophilic groups. 
     
     
         3 . The method according to  claim 1  in which the wafer back side coating is prepared from a material that hardens to a brittle material. 
     
     
         4 . The method according to  claim 3  in which the wafer is separated into individual circuits by partial sawing along the dicing streets followed by stretching and breaking the brittle wafer back side coating.