US2012019322A1PendingUtilityA1

Low dropout current source

Assignee: SILVA PRADEEP CHARLESPriority: Jul 23, 2010Filed: Jun 8, 2011Published: Jan 26, 2012
Est. expiryJul 23, 2030(~4 yrs left)· nominal 20-yr term from priority
H03F 2200/555H03F 2200/447H03F 2200/78H03F 3/189H03F 3/24G05F 1/575H03F 1/30
41
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

Disclosed is a low dropout current source that includes a first field effect transistor (FET), a second FET having a drain that is an output for an output voltage and an output current, and a third FET, wherein a gate of the first FET is coupled to both a gate of the second FET and a drain of the third FET, and wherein a drain of the first FET is coupled to a source of the third FET. A differential amplifier has an inverting input coupled to the drain of the first FET, a non-inverting input coupled to the drain of the second FET and an amplifier output coupled to the gate of the third FET. A current reference is coupled between the drain of the third FET and a fixed voltage node. The current reference provides a reference current that is multiplied and output from the third FET.

Claims

exact text as granted — not AI-modified
1 . A low dropout current source comprising:
 a first field effect transistor (FET) having a drain, a gate and a source, a second FET having a drain, a gate and a source, wherein the drain of the second FET is an output for an output voltage and an output current, and a third FET having a drain, a gate and a source, wherein the gate of the first FET is coupled to both the gate of the second FET and the drain of the third FET, and wherein the drain of the first FET is coupled to the source of the third FET;   a differential amplifier having an inverting input coupled to the drain of the first FET, a non-inverting input coupled to the drain of the second FET and an amplifier output coupled to the gate of the third FET; and   a current reference coupled between the drain of the third FET and a fixed voltage node.   
     
     
         2 . The low dropout current source of  claim 1 , wherein the fixed voltage node is ground. 
     
     
         3 . The low dropout current source of  claim 1 , wherein the source of the first FET and the source of the second FET are both coupled to a power source input. 
     
     
         4 . The low dropout current source of  claim 1 , wherein the current reference includes a temperature independent current source that is derived from a band-gap reference. 
     
     
         5 . The low dropout current source of  claim 1 , wherein the current reference includes a temperature dependent current source that is derived from proportional to absolute temperature (PTAT) current sources. 
     
     
         6 . The low dropout current source of  claim 1 , wherein an area of the second FET is sized relative to an area of the first FET to maintain a proportional relationship between a reference current provided by the current reference and an output current flowing through the second FET operating under a voltage headroom of around 75 mV. 
     
     
         7 . The low dropout current source of  claim 1 , wherein the output current that flows through the second FET remains at a constant current level as the second FET transitions from a saturation region operating point to a triode region operating point. 
     
     
         8 . A mobile terminal comprising:
 a power amplifier (PA) for amplifying signals to be transmitted from the mobile terminal;   a low dropout current source adapted to provide bias current to the PA, the low dropout current source comprising:
 a first FET having a drain, a gate and a source, a second FET having a drain, a gate and a source, wherein the drain of the second FET is an output for an output voltage and an output current, and a third FET having a drain, a gate and a source, wherein the gate of the first FET is coupled to both the gate of the second FET and the drain of the third FET, and wherein the drain of the first FET is coupled to the source of the third FET; 
 a differential amplifier having an inverting input coupled to the drain of the first FET, a non-inverting input coupled to the drain of the second FET and an amplifier output coupled to the gate of the third FET; and 
 a current reference coupled between the drain of the third FET and a fixed voltage node; and 
   a control system for enabling and disabling the low dropout current source.   
     
     
         9 . The mobile terminal of  claim 8 , wherein the fixed voltage node is ground. 
     
     
         10 . The mobile terminal of  claim 8 , wherein the source of the first FET and the source of the second FET are both coupled to a power source input. 
     
     
         11 . The mobile terminal of  claim 8 , wherein the current reference includes a temperature independent current source that is derived from a band-gap reference. 
     
     
         12 . The mobile terminal of  claim 8 , wherein the current reference includes a temperature dependent current source that is derived from PTAT current sources. 
     
     
         13 . The mobile terminal of  claim 8 , wherein the second FET is sized relative to the first FET to maintain a proportional relationship between a reference current provided by the current reference and an output current flowing through the second FET operating under a voltage headroom of around 75 mV. 
     
     
         14 . The mobile terminal of  claim 8 , wherein an output current that flows through the second FET remains at a constant current level as the second FET transitions from a saturation region operating point to a triode region operating point. 
     
     
         15 . A method of supplying a constant current to a circuit, comprising:
 providing a low dropout current source having a first FET, a second FET, a third FET, a current reference and a differential amplifier;   generating a reference current with the current reference such that the reference current flows through both the first FET and the third FET;   driving the third FET with the differential amplifier such that a drain-to-source voltage of the first FET is substantially equal to a drain-to-source voltage of the second FET; and   mirroring the reference current that flows through the first FET to the second FET to provide the constant current that flows through the second FET and into the circuit.   
     
     
         16 . The method of  claim 15 , wherein the current reference includes temperature compensation that is derived from a band-gap reference. 
     
     
         17 . The method of  claim 16 , wherein the temperature compensation is further derived from PTAT current sources. 
     
     
         18 . The method of  claim 15 , wherein the second FET is sized relative to the first FET to maintain a proportional relationship between a reference current provided by the current reference and the constant current that flows through the second FET operating under a voltage headroom of around 75 mV. 
     
     
         19 . The method of  claim 15 , wherein operation of the second FET transitions from operation in a saturation region to operation in a triode region while maintaining a constant current level to the circuit. 
     
     
         20 . The method of  claim 15 , wherein the constant current that flows through the second FET is a multiple of a current level of the reference current flowing through the first FET.

Join the waitlist — get patent alerts

Track US2012019322A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.