US2012001670A1PendingUtilityA1

Clock Routing in Mulitiple Channel Modules and Bus Systems

Individually held — no corporate assignee on recordPriority: May 10, 2000Filed: Sep 16, 2011Published: Jan 5, 2012
Est. expiryMay 10, 2020(expired)· nominal 20-yr term from priority
H05K 1/141H05K 1/023H05K 1/147H05K 2201/10189H05K 1/148H05K 7/1459H05K 1/117G11C 5/04G11C 5/00G06F 13/409
58
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

The terminating module includes integrated circuits and a termination circuit which receive clock signals from the integrated circuit. The integrated circuit includes at least one memory integrated circuit mounted on a printed circuit board. An electrical connector is configured to couple the terminating module to a motherboard. Additionally, the termination circuit includes a resistor. In another embodiment, the terminating module provides a printed circuit board, a memory integrated circuit mounted on the circuit board, a terminator circuit which includes a resistor, and an electrical connector. The electrical connector couples the terminating module to a motherboard.

Claims

exact text as granted — not AI-modified
1 . A method for routing a clock signal in a system that includes a motherboard and multiple modules coupled to the motherboard, the multiple modules including a first module and a second module coupled to each other via a flexible connector, the method comprising:
 transmitting a clock signal along traces on the motherboard to the first module;   transmitting the clock signal from the first module to the second module via the flexible connector; and   transmitting the clock signal from the second module back to the first module via the flexible connector.   
     
     
         2 . The method of  claim 1 , further comprising generating the clock signal at a clock generator on the motherboard. 
     
     
         3 . The method of  claim 1 , further comprising terminating the clock signal on one of the multiple modules. 
     
     
         4 . The method of  claim 1 , further comprising transmitting the clock signal from the first module back to the motherboard. 
     
     
         5 . A clock routing system comprising:
 a motherboard that includes at least one conductive trace for routing a clock signal;   multiple modules coupled to the motherboard, including a first module to receive the clock signal from the motherboard and a second module coupled to the first module via a flexible connector, where each module of the multiple modules includes at least one integrated circuit, the flexible connector including at least one first flexible conductor for routing the clock signal from the first module to the second module and at least one second flexible conductor for routing the clock signal from the second module back to the first module.   
     
     
         6 . The clock routing system of  claim 5 , wherein one of the multiple modules includes, a terminator circuit for terminating the clock signal. 
     
     
         7 . The clock routing system of  claim 5 , wherein the first module is removably attached to the motherboard. 
     
     
         8 . The clock routing system of  claim 5 , wherein the at least one conductive trace on the motherboard includes a conductive trace for routing the clock signal from the motherboard to the first module and a conductive trace for routing the clock signal from the first module back to the motherboard. 
     
     
         9 . A method for routing a clock signal in a system that includes a motherboard and multiple modules coupled to the motherboard, the multiple modules including first module and a second module coupled to each other at least partially through a flexible connector, the method comprising:
 transmitting a clock signal along traces on the motherboard to the first module;   transmitting the clock signal from the first module to the second module at least partially through the flexible connector;   transmitting the clock signal from the second module back to the first module at least partially through the flexible connector; and   terminating the clock signal.   
     
     
         10 . The method of  claim 9 , further comprising generating the clock signal at a clock generator on the motherboard. 
     
     
         11 . The method of  claim 9 , wherein the terminating occurs on one of the multiple modules. 
     
     
         12 . The method of  claim 9 , further comprising, transmitting the clock signal from the first module back to the motherboard. 
     
     
         13 . A clock routing system comprising:
 a motherboard that includes at least one conductive trace for routing a clock signal;   multiple modules each comprising at least one integrated circuit, the modules including:   a first module electrically coupled to the conductive trace so as to receive the clock signal from the motherboard;   a second module electrically coupled to the first module at least partially through a flexible connector so as to receive the clock signal from the first module;   wherein the flexible connector includes at least one first flexible conductor for routing the clock signal from the first module to the second module and at least one second flexible conductor for routing the clock signal from the second module back to the first module; and   a terminator circuit configured to terminate the clock signal.   
     
     
         14 . The clock routing system of  claim 13 , wherein one of the multiple modules includes a terminator circuit for terminating the clock signal. 
     
     
         15 . The clock routing system of  claim 13 , wherein the terminator circuit is on the second module. 
     
     
         16 . The clock routing system of  claim 13 , wherein the first module is removably attached to the motherboard.

Join the waitlist — get patent alerts

Track US2012001670A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.