US2012001265A1PendingUtilityA1

Method of manufacturing semiconductor device which a plurality of types of transistors are mounted

Assignee: TERAHARA MASANORIPriority: Mar 30, 2007Filed: Sep 14, 2011Published: Jan 5, 2012
Est. expiryMar 30, 2027(~0.7 yrs left)· nominal 20-yr term from priority
H10W 10/0148H10W 10/17H10P 30/20H10P 14/60H10D 84/0188H10D 84/0181H10D 84/038H10D 84/017
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Claims

Abstract

A method of manufacturing a semiconductor device includes the steps of forming a trench on a semiconductor substrate to define a first and a second element regions; burying a first oxide film in the trench; forming a second oxide film on surfaces of the first and second element regions; performing a first ion doping using a first mask which is exposing a first region containing the first element region and a part of the first oxide; performing a second ion doping using a second mask which is exposing a second region containing the second element region and a part of the first oxide film; and removing the second oxide film formed in the first element region and the second element region by etching, and the first oxide film is selectively thinned using the first or second mask after performing the first or second ion doping.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device, comprising:
 a semiconductor substrate where a plurality of element regions are defined with a trench on a surface of said semiconductor substrate;   an oxide film buried in said trench;   a gate insulator film formed on a surface of a plurality of said element regions;   a gate electrode formed on a surface of said gate insulator film,   wherein at least a part of said oxide film includes a first layer and a second layer deposited on said first layer with lower density of an ion compared to the first layer.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein:
 a height of said oxide film from the surface of said element region to the surface of said oxide film is equal.   
     
     
         3 . The semiconductor device according to  claim 1 , wherein:
 an upper surface of said oxide film and an upper surface of said element regions are level to each other.

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