US2011296260A1PendingUtilityA1

Semiconductor device

Assignee: KURIMOTO MASANORIPriority: Jul 17, 2007Filed: Aug 9, 2011Published: Dec 1, 2011
Est. expiryJul 17, 2027(~1 yrs left)· nominal 20-yr term from priority
G01R 31/31858
48
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Claims

Abstract

An object of the present invention is to provide a semiconductor device capable of recognizing circuit malfunction in an actual operation and of specifying a point of the circuit malfunction, and the semiconductor device, which does not induce the malfunction in the circuit of a subsequent stage when restoring the malfunction. The present invention is the semiconductor device provided with a plurality of logic circuits and a plurality of judging circuits for judging malfunction based on data from the logic circuits, wherein each of the judging circuits is provided with a first register, delay unit, a second register, a comparator and scanning unit, which makes the second register a shift register to allow to transmit an error signal held in the second register to the subsequent stage, while allowing the comparator to hold a comparison result.

Claims

exact text as granted — not AI-modified
1 - 17 . (canceled) 
     
     
         18 . A semiconductor device comprising a plurality of logic circuits and a plurality of judging circuits for judging malfunction based on data from said logic circuits, wherein
 each of said judging circuits comprises:   a first register for capturing the data from said logic circuits in a predetermined timing of a clock signal:   a delay unit for delaying said clock signal;   a second register logically equivalent to said first register for capturing the data from said logic circuits in a predetermined timing of said clock signal, which has passed through said delay unit; and   a comparator for comparing an output from said first register and an output from said second register to output an error signal, and wherein   any of a lock-up latch and an inverted flip-flop circuit is inserted on a path on which a hold violation occurs in a previous stage of said judging circuit.

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