Storage apparatus and method for controlling storage apparatus
Abstract
An object is to efficiently and securely process a data I/O request received from an external apparatus by a storage apparatus. A storage apparatus 10 includes a channel board 11 , a drive board 13 , a cache memory 14 , a plurality of processor boards 12 that perform data transfer, and a shared memory 15 , and the channel board 11 stores a third destination search 1211 that associates a sequence identifier with a processor identifier, the sequence identifier being information that identifies a sequence which includes a series of data frames delivered to and received from a host apparatus 2 and to which a data frame belongs, the processor identifier being information that identifies a processor 1221 included in the processor board 12 . The channel board 11 determines a processor to be a destination for the received data frame by acquiring the processor identifier associated with the sequence identifier acquired from the received data frame, from the third destination search 1211 , and transfers the received data frame to the processor 1221 thus determined.
Claims
exact text as granted — not AI-modified1 . A storage apparatus comprising:
at least one channel board for receiving a data frame transmitted from an external apparatus, the data frame including a data I/O request; at least one drive board for writing data into a storage device and reading data from the storage device, the storage device being formed of a plurality of storage drives; a cache memory for storing any of write data to be written into the storage device and read data having read from the storage device; a plurality of processor boards each for performing data transfer between at least two of the channel board, the drive board, and the cache memory; and a shared memory accessible by the processor boards, wherein the channel board stores a third destination search table that associates a sequence identifier with a processor identifier, the sequence identifier being information that identifies a sequence of a series of data frames delivered to and received from the external apparatus and to which the data frame belongs, the processor identifier being information that identifies a processor included in the processor board, determines the processor to be a destination for the received data frame, by acquiring, from the third destination search table, the processor identifier associated with the sequence identifier acquired from the received data frame, and transfers the received data frame to the processor thus determined, and the processor that has received the data frame performs processing with regard to the data frame.
2 . A storage apparatus comprising:
at least one channel board for receiving a data frame transmitted from an external apparatus, the data frame including a data I/O request; at least one drive board for writing data into a storage device and reading data from the storage device, the storage device being formed of a plurality of storage drives; a cache memory for storing any of write data to be written into the storage device and read data having read from the storage device; a plurality of processor boards each for performing data transfer between at least two of the channel board, the drive board, and the cache memory; and a shared memory accessible by the processor boards, wherein the channel board stores a third destination search table that associates a sequence identifier with a processor identifier, the sequence identifier being information that identifies a sequence of a series of data frames delivered to and received from the external apparatus and to which the data frame belongs, the processor identifier being information that identifies a processor included in the processor board, and determines the processor to be a destination for the received data frame, by acquiring, from the third destination search table, the processor identifier associated with the sequence identifier acquired from the received data frame, the channel board stores a first destination search table that associates an identifier of a communication port included in the channel board, an identifier of the external apparatus, an identifier of a logical volume provided by the storage device, and the processor identifier with each other, when the sequence identifier cannot be acquired from the received data frame, the channel board determines the processor to be the destination for the data frame by acquiring, from the first destination search table, the processor identifier associated with a combination of the identifier of the communication port at which the data frame has arrived, the identifier of the external apparatus included in the data frame, and the identifier of the logical volume included in the data frame, the channel board stores a second destination search table that associates the identifier of the logical volume provided by the storage device with the processor identifier, when the sequence identifier cannot be acquired from the received data frame, the channel board determines the processor to be the destination for the data frame by acquiring, from the second destination search table, the processor identifier associated with the identifier of the logical volume included in the data frame, the channel board stores a fourth destination search table that associates the identifier of the communication port with the processor identifier, when the processor to be the destination for the data frame cannot be determined using any of the first to the third destination search tables, the channel board determines the processor to be the destination for the received data frame by acquiring, from the fourth destination search table, the processor identifier associated with the identifier of the communication port at which the data frame has arrived, and transfers the received data frame to the processor thus determined, and the processor that has received the data frame performs processing with regard to the data frame.
3 . The storage apparatus according to claim 1 , wherein
the channel board stores a first destination search table that associates an identifier of a communication port included in the channel board, an identifier of the external apparatus, an identifier of a logical volume provided by the storage device, and the processor identifier with each other, when the sequence identifier cannot be acquired from the received data frame, the channel board determines the processor to be the destination for the data frame by acquiring, from the first destination search table, the processor identifier associated with a combination of the identifier of the communication port at which the data frame has arrived, the identifier of the external apparatus included in the data frame, and the identifier of the logical volume included in the data frame, and transfers the received data frame to the processor thus determined, and the processor that has received the data frame performs processing with regard to the data frame.
4 . The storage apparatus according to claim 1 , wherein
the channel board stores a second destination search table that associates the identifier of the logical volume provided by the storage device with the processor identifier, when the sequence identifier cannot be acquired from the received data frame, the channel board determines the processor to be the destination for the data frame by acquiring, from the second destination search table, the processor identifier associated with the identifier of the logical volume included in the data frame, and transfers the received data frame to the processor thus determined, and the processor that has received the data frame performs processing with regard to the data frame.
5 . The storage apparatus according to claim 1 , wherein the channel board comprises:
a frame processing chip that registers the data frame received from the external apparatus in a queue; and a frame transfer chip that reads the data frame from the queue, determines a processor to be the destination for the read data frame, and transfers the data frame to the processor thus determined.
6 . The storage apparatus according to claim 5 , wherein
the frame processing chip registers the data frame including the sequence identifier in the queue, the data frame being for notifying the processor of a message indicating that the external apparatus has been responded with regard to the processing performed according to the data I/O request, and the frame transfer chip determines the processor to be the destination for the data frame by acquiring, from the third destination search table, the processor identifier associated with the sequence identifier acquired from the data frame, and transfers the received data frame to the processor thus determined to be the destination.
7 . The storage apparatus according to claim 1 , wherein
the data frame is an FC frame of Fibre Channel protocol, the sequence is an exchange sequence, and the sequence identifier is an exchange number set in an RX_ID of the FC frame.
8 . The storage apparatus according to claim 1 , wherein the processor identifier is an identifier that identifies a processor set formed of a plurality of the processors.
9 . A method for controlling a storage apparatus, the storage apparatus including
at least one channel board for receiving a data frame transmitted from an external apparatus, the data frame including a data I/O request; at least one drive board for writing data into a storage device and reading data from the storage device, the storage device being formed of a plurality of storage drives; a cache memory for storing any of write data to be written into the storage device and read data having read from the storage device; a plurality of processor boards each for performing data transfer between at least two of the channel board, the drive board, and the cache memory; and a shared memory accessible by the processor boards, the method comprising: the channel board storing a third destination search table that associates a sequence identifier with a processor identifier, the sequence identifier being information that identifies a sequence of a series of data frames delivered to and received from the external apparatus and to which the data frame belongs, the processor identifier being information that identifies a processor included in the processor board, and determining the processor to be a destination for the received data frame, by acquiring, from the third destination search table, the processor identifier associated with the sequence identifier acquired from the received data frame, the channel board storing a first destination search table that associates an identifier of a communication port included in the channel board, an identifier of the external apparatus, an identifier of a logical volume provided by the storage device, and the processor identifier with each other, when the sequence identifier cannot be acquired from the received data frame, the channel board determining the processor to be the destination for the data frame by acquiring, from the first destination search table, the processor identifier associated with a combination of the identifier of the communication port at which the data frame has arrived, the identifier of the external apparatus included in the data frame, and the identifier of the logical volume included in the data frame, the channel board storing a second destination search table that associates the identifier of the logical volume provided by the storage device with the processor identifier, when the sequence identifier cannot be acquired from the received data frame, the channel board determining the processor to be the destination for the data frame by acquiring, from the second destination search table, the processor identifier associated with the identifier of the logical volume included in the data frame, the channel board storing a fourth destination search table that associates the identifier of the communication port with the processor identifier, when the processor to be the destination for the data frame cannot be determined using any of the first to the third destination search tables, the channel board determining the processor to be the destination for the received data frame by acquiring, from the fourth destination search table, the processor identifier associated with the identifier of the communication port at which the data frame has arrived, and transferring the received data frame to the processor thus determined, and the processor that has received the data frame performing processing with regard to the data frame.Join the waitlist — get patent alerts
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