Pulse generating circuit and pulse width modulator

Abstract

A pulse generating unit receives a clock at a predetermined frequency, and generates a pulse signal which transits synchronously with the positive edge of the clock. A flip-flop acquires the pulse signal every time a positive edge occurs in an inverted clock output from the inverter. A logic gate multiplexes the pulse signal and the output of the flip-flop. A selector selects either the output of the logic gate or the pulse signal.

1 - 8 . (canceled) 
     
     
         9 . A delay circuit which applies a variable delay to a negative edge of an input pulse, the delay circuit comprising:
 a delay unit group which includes a plurality of delay units connected to one another in a cascade manner in which the input pulse is input to the first delay unit; and   a logic gate which multiplexes the output signals of the plurality of the delay units and the input pulse,   wherein each of the delay units has an enable terminal via which an enable signal can be input,   and wherein, when the enable signal is asserted, the delay unit applies a predetermined delay to the pulse signal,   and wherein, when the enable signal is negated, the delay unit is set to the OFF state.   
     
     
         10 . A pulse width modulator comprising:
 a delay circuit according to  claim 9 ; and   a pulse width control unit which generates the enable signal for each of the plurality of delay units included in the delay circuit.   
     
     
         11 . A control circuit for a switching regulator, comprising:
 an A/D converter which converts the output voltage of the switching regulator into a digital value;   a pulse modulator which generates a pulse signal having a pulse width adjusted such that the digital value output from the A/D converter approaches a predetermined target value; and   a driver which drives a switching element included in the switching regulator using the pulse signal output from the pulse modulator,   wherein the pulse modulator includes the pulse width modulator according to  claim 10 .