Method of fabricating a semiconductor device including ion implantation at a tilt angle in exposed regions

Abstract

A method of fabricating a semiconductor device includes forming a mask pattern for defining a region of a semiconductor substrate. An impurity layer for adjusting the threshold voltage of a cell will be formed in the defined region. Dopant ions are implanted into the defined region of the semiconductor substrate at a tilt angle of approximately 4.4° to 7°.

1 .- 11 . (canceled) 
     
     
         12 . A method of fabricating a semiconductor device, the method comprising:
 forming a mask pattern for defining a region on a semiconductor substrate, wherein an impurity layer for adjusting the threshold voltage of a cell will be formed in the defined region; and   implanting dopant ions into the defined region of the semiconductor substrate at a tilt angle of approximately 4.4° to 7°.   
     
     
         13 . The method according to  claim 12 , wherein the mask pattern is formed to expose the region in which the impurity layer for adjusting the threshold voltage of an NMOS transistor will be formed, and wherein implanting the dopant ions further comprises implanting BF2 49  ions at a concentration of 1.0×10 13  atoms/cm 2  to 3×10 13  atoms/cm 2  and at an energy of approximately 10 to 40 KeV. 
     
     
         14 . The method according to  claim 12 , wherein the mask pattern is formed to expose the region in which the impurity layer for adjusting the threshold voltage of a PMOS transistor will be formed, and wherein implanting the dopant ions further comprises implanting P 31  ions at a concentration of approximately 1.0×10 12  atoms/cm 2  to 35×10 12  atoms/cm 2  and at an energy of approximately 10 to 40 KeV.